📦 Tool to enable package managing for HDL VIP or IP cores (Verilog, SystemVerilog, VHDL) using Python pip
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Updated
Jan 26, 2024 - Python
📦 Tool to enable package managing for HDL VIP or IP cores (Verilog, SystemVerilog, VHDL) using Python pip
RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projects - IEEE LAD'24
Final project: Tic-tac-toe on VGA monitor. ENGS31/CS56 Digital Electronics @ Dartmouth.
an RTL circuit that sorts the integer values in a momory unit connected with (almost) AXI-Lite
This project implements a SPI (Serial Peripheral Interface) slave module with a single port RAM block. The SPI slave module receives data from a master device and communicates with the single port RAM to store and retrieve data.
BDD Gherkin implementation in native SystemVerilog, based on UVM.
RTL Design of Serial Peripheral Interface
Simple RTL model for Interger Numbers Calculation using RAM and 7 Segment Display.
Design of a BIST module for RISC-V fault testing
Digital Logical Designs Course Projects
Integration of Arty A7-100T with MPU-6050 Gyroscope Sensor for Motion Sensing and FPGA Testing
RTL Design of Universal Asynchronous Receiver-Transmitter
Integration of Arty A7-100T with BME280 Pressure Sensor for Pressure Sensing and FPGA Testing
The computational speed of the dadda multiplier can be enhanced by partitioning the partial products. In process to achieve low power we have considered pass transistor for logical implementation.
RTL Design of Inter-Integrated Circuit
This repository includes all the projects I have done for object-oriented modeling of electronic circuits course at the University of Tehran. In these projects, C++ is used along with SystemC and SystemC-AMS libraries. Spring 2022
probable journey of RTL coding ft. Chandra Prakash
Projects showcase
Verification of D-FF using UVM on EDA playground
Non-intrusive packet delivery monitoring service for Networks-on-Chip (NoCs) focusing on real-time systems. Hardware verification and development in C++/SystemC using the Visual Studio 2017 IDE.
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