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Add riscv64 support
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Signed-off-by: Felix Yan <felixonmars@archlinux.org>
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felixonmars committed Sep 9, 2021
1 parent 2d242ee commit 82a94ef
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Showing 3 changed files with 5 additions and 0 deletions.
1 change: 1 addition & 0 deletions benches/roundtrip.rs
Expand Up @@ -32,6 +32,7 @@ const MIN_ALIGN: usize = 8;
target_arch = "powerpc64",
target_arch = "powerpc64le",
target_arch = "mips64",
target_arch = "riscv64",
target_arch = "s390x",
target_arch = "sparc64"
)))]
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3 changes: 3 additions & 0 deletions jemalloc-sys/build.rs
Expand Up @@ -309,6 +309,9 @@ fn main() {
} else if !target.contains("windows") {
println!("cargo:rustc-link-lib=pthread");
}
if target.contains("riscv") {
println!("cargo:rustc-link-lib=atomic");
}
println!("cargo:rerun-if-changed=jemalloc");
}

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1 change: 1 addition & 0 deletions src/lib.rs
Expand Up @@ -54,6 +54,7 @@ const ALIGNOF_MAX_ALIGN_T: usize = 8;
target_arch = "powerpc64",
target_arch = "powerpc64le",
target_arch = "mips64",
target_arch = "riscv64",
target_arch = "s390x",
target_arch = "sparc64"
)))]
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