wazevo(amd64): pass memory all stores / call_indirect tests (tetratel…

…abs#1958)
refraction-networking · Jan 25, 2024 · d6ab95b · d6ab95b
1 parent d3f919a
commit d6ab95b
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Showing 3 changed files with 33 additions and 3 deletions.
diff --git a/internal/engine/wazevo/backend/isa/amd64/instr_encoding.go b/internal/engine/wazevo/backend/isa/amd64/instr_encoding.go
@@ -1218,7 +1218,7 @@ func (ri rexInfo) encodeForIndex(c backend.Compiler, encR regEnc, encIndex regEn
 	x := encIndex.rexBit()
 	b := encBase.rexBit()
 	rex := byte(0x40) | w<<3 | r<<2 | x<<1 | b
-	if rex != 0x40 || ri&0x02 == 1 {
+	if rex != 0x40 || ri&0x02 != 0 {
 		c.EmitByte(rex)
 	}
 }

diff --git a/internal/engine/wazevo/backend/isa/amd64/instr_encoding_test.go b/internal/engine/wazevo/backend/isa/amd64/instr_encoding_test.go
@@ -1893,6 +1893,30 @@ func TestInstruction_format_encode(t *testing.T) {
 			want:       "4088b800001000",
 			wantFormat: "mov.b %rdi, 1048576(%rax)",
 		},
+		{
+			setup: func(i *instruction) {
+				a := newOperandMem(newAmodeRegRegShift(1, rcxVReg, rdxVReg, 0))
+				i.asMovRM(rsiVReg, a, 1)
+			},
+			want:       "4088741101",
+			wantFormat: "mov.b %rsi, 1(%rcx,%rdx,1)",
+		},
+		{
+			setup: func(i *instruction) {
+				a := newOperandMem(newAmodeRegRegShift(1, rcxVReg, rdxVReg, 1))
+				i.asMovRM(rdiVReg, a, 1)
+			},
+			want:       "40887c5101",
+			wantFormat: "mov.b %rdi, 1(%rcx,%rdx,2)",
+		},
+		{
+			setup: func(i *instruction) {
+				a := newOperandMem(newAmodeRegRegShift(1, rcxVReg, rdxVReg, 1))
+				i.asMovRM(rdiVReg, a, 2)
+			},
+			want:       "66897c5101",
+			wantFormat: "mov.w %rdi, 1(%rcx,%rdx,2)",
+		},
 		{
 			setup: func(i *instruction) {
 				a := newOperandMem(newAmodeRegRegShift(1<<20, raxVReg, rcxVReg, 3))
@@ -1901,6 +1925,14 @@ func TestInstruction_format_encode(t *testing.T) {
 			want:       "6689bcc800001000",
 			wantFormat: "mov.w %rdi, 1048576(%rax,%rcx,8)",
 		},
+		{
+			setup: func(i *instruction) {
+				a := newOperandMem(newAmodeRegRegShift(1<<20, rcxVReg, rdxVReg, 3))
+				i.asMovRM(rdiVReg, a, 2)
+			},
+			want:       "6689bcd100001000",
+			wantFormat: "mov.w %rdi, 1048576(%rcx,%rdx,8)",
+		},
 		{
 			setup: func(i *instruction) {
 				a := newOperandMem(newAmodeRegRegShift(123, raxVReg, rcxVReg, 0))

diff --git a/internal/engine/wazevo/e2e_test.go b/internal/engine/wazevo/e2e_test.go
@@ -265,7 +265,6 @@ func TestE2E(t *testing.T) {
 			name: "call_indirect",
 			m:    testcases.CallIndirect.Module,
 			// parameter == table offset.
-			skipAMD64: true,
 			calls: []callCase{
 				{params: []uint64{0}, expErr: "indirect call type mismatch"},
 				{params: []uint64{1}, expResults: []uint64{10}},
@@ -538,7 +537,6 @@ func TestE2E_host_functions(t *testing.T) {
 }
 
 func TestE2E_stores(t *testing.T) {
-	skipOnAmd64(t)
 	config := newRuntimeConfigOptimizingCompiler()
 
 	ctx := context.Background()