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Add CPUInfo parsing for LoongArch64 (#384)
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Signed-off-by: Wenlong Zhang <zhangwenlong@loongson.cn>
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zhangwenlong8911 committed Dec 17, 2022
1 parent 85417ca commit 88f86e5
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Showing 4 changed files with 134 additions and 2 deletions.
36 changes: 36 additions & 0 deletions cpuinfo.go
Expand Up @@ -380,6 +380,42 @@ func parseCPUInfoMips(info []byte) ([]CPUInfo, error) {
return cpuinfo, nil
}

func parseCPUInfoLoong(info []byte) ([]CPUInfo, error) {
scanner := bufio.NewScanner(bytes.NewReader(info))
// find the first "processor" line
firstLine := firstNonEmptyLine(scanner)
if !strings.HasPrefix(firstLine, "system type") || !strings.Contains(firstLine, ":") {
return nil, errors.New("invalid cpuinfo file: " + firstLine)
}
field := strings.SplitN(firstLine, ": ", 2)
cpuinfo := []CPUInfo{}
systemType := field[1]
i := 0
for scanner.Scan() {
line := scanner.Text()
if !strings.Contains(line, ":") {
continue
}
field := strings.SplitN(line, ": ", 2)
switch strings.TrimSpace(field[0]) {
case "processor":
v, err := strconv.ParseUint(field[1], 0, 32)
if err != nil {
return nil, err
}
i = int(v)
cpuinfo = append(cpuinfo, CPUInfo{}) // start of the next processor
cpuinfo[i].Processor = uint(v)
cpuinfo[i].VendorID = systemType
case "CPU Family":
cpuinfo[i].CPUFamily = field[1]
case "Model Name":
cpuinfo[i].ModelName = field[1]
}
}
return cpuinfo, nil
}

func parseCPUInfoPPC(info []byte) ([]CPUInfo, error) {
scanner := bufio.NewScanner(bytes.NewReader(info))

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19 changes: 19 additions & 0 deletions cpuinfo_loong64.go
@@ -0,0 +1,19 @@
// Copyright 2022 The Prometheus Authors
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

//go:build linux
// +build linux

package procfs

var parseCPUInfo = parseCPUInfoLoong
4 changes: 2 additions & 2 deletions cpuinfo_others.go
Expand Up @@ -11,8 +11,8 @@
// See the License for the specific language governing permissions and
// limitations under the License.

//go:build linux && !386 && !amd64 && !arm && !arm64 && !mips && !mips64 && !mips64le && !mipsle && !ppc64 && !ppc64le && !riscv64 && !s390x
// +build linux,!386,!amd64,!arm,!arm64,!mips,!mips64,!mips64le,!mipsle,!ppc64,!ppc64le,!riscv64,!s390x
//go:build linux && !386 && !amd64 && !arm && !arm64 && !loong64 && !mips && !mips64 && !mips64le && !mipsle && !ppc64 && !ppc64le && !riscv64 && !s390x
// +build linux,!386,!amd64,!arm,!arm64,!loong64,!mips,!mips64,!mips64le,!mipsle,!ppc64,!ppc64le,!riscv64,!s390x

package procfs

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77 changes: 77 additions & 0 deletions cpuinfo_test.go
Expand Up @@ -232,6 +232,70 @@ processor : 1
hart : 1
isa : rv64imafdcsu
mmu : sv48
`

cpuinfoLoong64 = `
system type : generic-loongson-machine
processor : 0
package : 0
core : 0
CPU Family : Loongson-64bit
Model Name : Loongson-3A5000
CPU Revision : 0x10
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu complex crypto lvz
Hardware Watchpoint : yes, iwatch count: 0, dwatch count: 0
processor : 1
package : 0
core : 1
CPU Family : Loongson-64bit
Model Name : Loongson-3A5000
CPU Revision : 0x10
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu complex crypto lvz
Hardware Watchpoint : yes, iwatch count: 0, dwatch count: 0
processor : 2
package : 0
core : 2
CPU Family : Loongson-64bit
Model Name : Loongson-3A5000
CPU Revision : 0x10
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu complex crypto lvz
Hardware Watchpoint : yes, iwatch count: 0, dwatch count: 0
processor : 3
package : 0
core : 3
CPU Family : Loongson-64bit
Model Name : Loongson-3A5000
CPU Revision : 0x10
FPU Revision : 0x00
CPU MHz : 2500.00
BogoMIPS : 5000.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32 loongarch64
Features : cpucfg lam ual fpu complex crypto lvz
Hardware Watchpoint : yes, iwatch count: 0, dwatch count: 0
`
)

Expand Down Expand Up @@ -402,3 +466,16 @@ func TestCPUInfoParseRISCV64(t *testing.T) {
t.Errorf("want ModelName %v, have %v", want, have)
}
}

func TestCPUInfoParseLoong64(t *testing.T) {
cpuinfo, err := parseCPUInfoLoong([]byte(cpuinfoLoong64))
if err != nil || cpuinfo == nil {
t.Fatalf("unable to parse loong cpu info: %v", err)
}
if want, have := 4, len(cpuinfo); want != have {
t.Errorf("want number of processors %v, have %v", want, have)
}
if want, have := "Loongson-64bit", cpuinfo[1].CPUFamily; want != have {
t.Errorf("want CPUFamily '%v', have '%v'", want, have)
}
}

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