[AMDGPU] Only set Info.memVT when not later overridden

[jrtc27]

For the amdgcn_*_buffer_load_lds intrinsics this field is later overriden, so avoid pointlessly calling MVT::getVT in that case. Importantly, this is also the only case I can find in tree where a PointerType is passed to MVT::getVT, so this will allow us to forbid doing so in future, keeping MVT::iPTR as originating solely from TableGen as was claimed next to its definition in MachineValueType.h (but lost in the autogeneration conversion).

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Jessica Clarke (jrtc27)

Changes

For the amdgcn_*_buffer_load_lds intrinsics this field is later overriden, so avoid pointlessly calling MVT::getVT in that case. Importantly, this is also the only case I can find in tree where a PointerType is passed to MVT::getVT, so this will allow us to forbid doing so in future, keeping MVT::iPTR as originating solely from TableGen as was claimed next to its definition in MachineValueType.h (but lost in the autogeneration conversion).

---

Full diff: https://github.com/llvm/llvm-project/pull/92670.diff

1 Files Affected:

• (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+1-1)

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 89e83babcfef4..801ab4b65cbc0 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1233,13 +1233,13 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
       // Atomic
       Info.opc = CI.getType()->isVoidTy() ? ISD::INTRINSIC_VOID :
                                             ISD::INTRINSIC_W_CHAIN;
-      Info.memVT = MVT::getVT(CI.getArgOperand(0)->getType());
       Info.flags |= MachineMemOperand::MOLoad |
                     MachineMemOperand::MOStore |
                     MachineMemOperand::MODereferenceable;
 
       switch (IntrID) {
       default:
+        Info.memVT = MVT::getVT(CI.getArgOperand(0)->getType());
         // XXX - Should this be volatile without known ordering?
         Info.flags |= MachineMemOperand::MOVolatile;
         break;

[github-actions]

⚠️ C/C++ code formatter, clang-format found issues in your code. ⚠️

You can test this locally with the following command:

git-clang-format --diff ba8a2ade84f4c1bfc531fe3673470377c038f31d 20b5ad9f94db4456953abb21b63b0fa9cf3e4e1c -- llvm/lib/Target/AMDGPU/SIISelLowering.cpp

View the diff from clang-format here.

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 801ab4b65c..b62aff0fb6 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1231,8 +1231,8 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
       Info.flags |= MachineMemOperand::MOStore;
     } else {
       // Atomic
-      Info.opc = CI.getType()->isVoidTy() ? ISD::INTRINSIC_VOID :
-                                            ISD::INTRINSIC_W_CHAIN;
+      Info.opc = CI.getType()->isVoidTy() ? ISD::INTRINSIC_VOID
+                                          : ISD::INTRINSIC_W_CHAIN;
       Info.flags |= MachineMemOperand::MOLoad |
                     MachineMemOperand::MOStore |
                     MachineMemOperand::MODereferenceable;