Fix handling of 32 bit left-shift operations in interperter (#256)

* Fix handling of 32 bit left-shift operations in interperter Signed-off-by: Alan Jowett <atjowet@gmail.com> * PR feedback Signed-off-by: Alan Jowett <atjowet@gmail.com> --------- Signed-off-by: Alan Jowett <atjowet@gmail.com> Co-authored-by: Alan Jowett <atjowet@gmail.com>
iovisor · May 19, 2023 · e17e8bb · e17e8bb
1 parent 48ec801
commit e17e8bb
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Showing 2 changed files with 11 additions and 9 deletions.
diff --git a/external/bpf_conformance b/external/bpf_conformance
diff --git a/vm/ubpf_vm.c b/vm/ubpf_vm.c
@@ -27,6 +27,8 @@
 #include <unistd.h>
 
 #define MAX_EXT_FUNCS 64
+#define SHIFT_MASK_32_BIT(X) ((X)&0x1f)
+#define SHIFT_MASK_64_BIT(X) ((X)&0x3f)
 
 static bool
 validate(const struct ubpf_vm* vm, const struct ebpf_inst* insts, uint32_t num_insts, char** errmsg);
@@ -335,19 +337,19 @@ ubpf_exec(const struct ubpf_vm* vm, void* mem, size_t mem_len, uint64_t* bpf_ret
             reg[inst.dst] &= UINT32_MAX;
             break;
         case EBPF_OP_LSH_IMM:
-            reg[inst.dst] <<= inst.imm;
+            reg[inst.dst] = u32(reg[inst.dst]) << SHIFT_MASK_32_BIT(inst.imm);
             reg[inst.dst] &= UINT32_MAX;
             break;
         case EBPF_OP_LSH_REG:
-            reg[inst.dst] <<= reg[inst.src];
+            reg[inst.dst] = u32(reg[inst.dst]) << SHIFT_MASK_32_BIT(reg[inst.src]);
             reg[inst.dst] &= UINT32_MAX;
             break;
         case EBPF_OP_RSH_IMM:
-            reg[inst.dst] = u32(reg[inst.dst]) >> inst.imm;
+            reg[inst.dst] = u32(reg[inst.dst]) >> SHIFT_MASK_32_BIT(inst.imm);
             reg[inst.dst] &= UINT32_MAX;
             break;
         case EBPF_OP_RSH_REG:
-            reg[inst.dst] = u32(reg[inst.dst]) >> reg[inst.src];
+            reg[inst.dst] = u32(reg[inst.dst]) >> SHIFT_MASK_32_BIT(reg[inst.src]);
             reg[inst.dst] &= UINT32_MAX;
             break;
         case EBPF_OP_NEG:
@@ -442,16 +444,16 @@ ubpf_exec(const struct ubpf_vm* vm, void* mem, size_t mem_len, uint64_t* bpf_ret
             reg[inst.dst] &= reg[inst.src];
             break;
         case EBPF_OP_LSH64_IMM:
-            reg[inst.dst] <<= inst.imm;
+            reg[inst.dst] <<= SHIFT_MASK_64_BIT(inst.imm);
             break;
         case EBPF_OP_LSH64_REG:
-            reg[inst.dst] <<= reg[inst.src];
+            reg[inst.dst] <<= SHIFT_MASK_64_BIT(reg[inst.src]);
             break;
         case EBPF_OP_RSH64_IMM:
-            reg[inst.dst] >>= inst.imm;
+            reg[inst.dst] >>= SHIFT_MASK_64_BIT(inst.imm);
             break;
         case EBPF_OP_RSH64_REG:
-            reg[inst.dst] >>= reg[inst.src];
+            reg[inst.dst] >>= SHIFT_MASK_64_BIT(reg[inst.src]);
             break;
         case EBPF_OP_NEG64:
             reg[inst.dst] = -reg[inst.dst];