Update example.

CHANGELOG.md

@@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [Unreleased]
 
+- Use more idiomatic rust code in readme/doc.rs example.
+
 ## [9.1.0] - 2021-07-03
 
 ### Added

README.md

@@ -10,28 +10,22 @@ The code should be in sync with the latest March 2018 revision of the Intel Arch
 use raw_cpuid::CpuId;
 let cpuid = CpuId::new();
 
-match cpuid.get_vendor_info() {
-    Some(vf) => assert!(vf.as_string() == "GenuineIntel" || vf.as_string() == "AuthenticAMD"),
-    None => ()
+if let Some(vf) = cpuid.get_vendor_info() {
+    assert!(vf.as_string() == "GenuineIntel" || vf.as_string() == "AuthenticAMD");
 }
 
-let has_sse = match cpuid.get_feature_info() {
-    Some(finfo) => finfo.has_sse(),
-    None => false
-};
-
+let has_sse = cpuid.get_feature_info().map_or(false, |finfo| finfo.has_sse());
 if has_sse {
     println!("CPU supports SSE!");
 }
 
-match cpuid.get_cache_parameters() {
-    Some(cparams) => {
-        for cache in cparams {
-            let size = cache.associativity() * cache.physical_line_partitions() * cache.coherency_line_size() * cache.sets();
-            println!("L{}-Cache size is {}", cache.level(), size);
-        }
-    },
-    None => println!("No cache parameter information available"),
+if let Some(cparams) = cpuid.get_cache_parameters() {
+    for cache in cparams {
+        let size = cache.associativity() * cache.physical_line_partitions() * cache.coherency_line_size() * cache.sets();
+        println!("L{}-Cache size is {}", cache.level(), size);
+    }
+} else {
+    println!("No cache parameter information available")
 }
 ```
 

src/lib.rs

@@ -8,31 +8,24 @@
 //! ## Example
 //! ```rust
 //! use raw_cpuid::CpuId;
-//!
 //! let cpuid = CpuId::new();
 //!
-//! match cpuid.get_vendor_info() {
-//!     Some(vf) => assert!(vf.as_string() == "GenuineIntel" || vf.as_string() == "AuthenticAMD"),
-//!     None => ()
+//! if let Some(vf) = cpuid.get_vendor_info() {
+//!     assert!(vf.as_string() == "GenuineIntel" || vf.as_string() == "AuthenticAMD");
 //! }
 //!
-//! let has_sse = match cpuid.get_feature_info() {
-//!     Some(finfo) => finfo.has_sse(),
-//!     None => false
-//! };
-//!
+//! let has_sse = cpuid.get_feature_info().map_or(false, |finfo| finfo.has_sse());
 //! if has_sse {
 //!     println!("CPU supports SSE!");
 //! }
 //!
-//! match cpuid.get_cache_parameters() {
-//!     Some(cparams) => {
-//!         for cache in cparams {
+//! if let Some(cparams) = cpuid.get_cache_parameters() {
+//!     for cache in cparams {
 //!         let size = cache.associativity() * cache.physical_line_partitions() * cache.coherency_line_size() * cache.sets();
 //!         println!("L{}-Cache size is {}", cache.level(), size);
-//!         }
 //!     }
-//!     None => println!("No cache parameter information available"),
+//! } else {
+//!     println!("No cache parameter information available")
 //! }
 //! ```