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Support GDB on AArch64 #4355

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10 changes: 5 additions & 5 deletions Cargo.lock

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3 changes: 3 additions & 0 deletions arch/src/aarch64/regs.rs
Expand Up @@ -39,3 +39,6 @@ macro_rules! arm64_sys_reg {
}

arm64_sys_reg!(MPIDR_EL1, 3, 0, 0, 0, 5);
arm64_sys_reg!(ID_AA64MMFR0_EL1, 3, 0, 0, 7, 0);
arm64_sys_reg!(TTBR1_EL1, 3, 0, 2, 0, 1);
arm64_sys_reg!(TCR_EL1, 3, 0, 2, 0, 2);
3 changes: 2 additions & 1 deletion hypervisor/Cargo.toml
Expand Up @@ -15,8 +15,9 @@ anyhow = "1.0.61"
byteorder = "1.4.3"
thiserror = "1.0.32"
libc = "0.2.129"
gdbstub = "0.6.2"
log = "0.4.17"
kvm-ioctls = { version = "0.11.0", optional = true }
kvm-ioctls = { git = "https://github.com/rust-vmm/kvm-ioctls", branch = "main", optional = true }
kvm-bindings = { git = "https://github.com/cloud-hypervisor/kvm-bindings", branch = "ch-v0.5.0-tdx", features = ["with-serde", "fam-wrappers"], optional = true }
mshv-bindings = { git = "https://github.com/rust-vmm/mshv", branch = "main", features = ["with-serde", "fam-wrappers"], optional = true }
mshv-ioctls = { git = "https://github.com/rust-vmm/mshv", branch = "main", optional = true}
Expand Down
11 changes: 7 additions & 4 deletions hypervisor/src/cpu.rs
Expand Up @@ -18,9 +18,8 @@ use crate::arch::x86::{
use crate::kvm::{TdxExitDetails, TdxExitStatus};
use crate::CpuState;
use crate::MpState;
use gdbstub::target::ext::breakpoints::WatchKind;
use thiserror::Error;
#[cfg(target_arch = "x86_64")]
use vm_memory::GuestAddress;

#[derive(Error, Debug)]
///
Expand Down Expand Up @@ -347,11 +346,15 @@ pub trait Vcpu: Send + Sync {
fn notify_guest_clock_paused(&self) -> Result<()> {
Ok(())
}
#[cfg(target_arch = "x86_64")]
///
/// Sets debug registers to set hardware breakpoints and/or enable single step.
///
fn set_guest_debug(&self, _addrs: &[GuestAddress], _singlestep: bool) -> Result<()> {
fn set_guest_debug(
&self,
_breakpoints: &[vm_memory::GuestAddress],
_watchpoints: &[(vm_memory::GuestAddress, u64, WatchKind)],
_singlestep: bool,
) -> Result<()> {
Err(HypervisorCpuError::SetDebugRegs(anyhow!("unimplemented")))
}
///
Expand Down
118 changes: 97 additions & 21 deletions hypervisor/src/kvm/mod.rs
Expand Up @@ -24,6 +24,7 @@ use crate::vm::{self, InterruptSourceConfig, VmOps};
use crate::HypervisorType;
#[cfg(target_arch = "aarch64")]
use crate::{arm64_core_reg_id, offset__of};
use gdbstub::target::ext::breakpoints::WatchKind;
use kvm_ioctls::{NoDatamatch, VcpuFd, VmFd};
use std::any::Any;
use std::collections::HashMap;
Expand Down Expand Up @@ -60,8 +61,8 @@ use crate::{
use aarch64::{RegList, Register, StandardRegisters};
#[cfg(target_arch = "x86_64")]
use kvm_bindings::{
kvm_enable_cap, kvm_guest_debug, kvm_msr_entry, MsrList, KVM_CAP_HYPERV_SYNIC,
KVM_CAP_SPLIT_IRQCHIP, KVM_GUESTDBG_ENABLE, KVM_GUESTDBG_SINGLESTEP, KVM_GUESTDBG_USE_HW_BP,
kvm_enable_cap, kvm_msr_entry, MsrList, KVM_CAP_HYPERV_SYNIC, KVM_CAP_SPLIT_IRQCHIP,
KVM_GUESTDBG_USE_HW_BP,
};
#[cfg(target_arch = "x86_64")]
use x86_64::check_required_kvm_extensions;
Expand All @@ -74,16 +75,17 @@ pub use kvm_bindings;
#[cfg(feature = "tdx")]
use kvm_bindings::KVMIO;
pub use kvm_bindings::{
kvm_clock_data, kvm_create_device, kvm_device_type_KVM_DEV_TYPE_VFIO, kvm_irq_routing,
kvm_irq_routing_entry, kvm_mp_state, kvm_userspace_memory_region, KVM_IRQ_ROUTING_IRQCHIP,
KVM_IRQ_ROUTING_MSI, KVM_MEM_LOG_DIRTY_PAGES, KVM_MEM_READONLY, KVM_MSI_VALID_DEVID,
kvm_clock_data, kvm_create_device, kvm_device_type_KVM_DEV_TYPE_VFIO, kvm_guest_debug,
kvm_irq_routing, kvm_irq_routing_entry, kvm_mp_state, kvm_userspace_memory_region,
KVM_GUESTDBG_ENABLE, KVM_GUESTDBG_SINGLESTEP, KVM_IRQ_ROUTING_IRQCHIP, KVM_IRQ_ROUTING_MSI,
KVM_MEM_LOG_DIRTY_PAGES, KVM_MEM_READONLY, KVM_MSI_VALID_DEVID,
};
#[cfg(target_arch = "aarch64")]
use kvm_bindings::{
kvm_regs, user_fpsimd_state, user_pt_regs, KVM_NR_SPSR, KVM_REG_ARM64, KVM_REG_ARM64_SYSREG,
KVM_REG_ARM64_SYSREG_CRM_MASK, KVM_REG_ARM64_SYSREG_CRN_MASK, KVM_REG_ARM64_SYSREG_OP0_MASK,
KVM_REG_ARM64_SYSREG_OP1_MASK, KVM_REG_ARM64_SYSREG_OP2_MASK, KVM_REG_ARM_CORE,
KVM_REG_SIZE_U128, KVM_REG_SIZE_U32, KVM_REG_SIZE_U64,
kvm_regs, user_fpsimd_state, user_pt_regs, KVM_GUESTDBG_USE_HW, KVM_NR_SPSR, KVM_REG_ARM64,
KVM_REG_ARM64_SYSREG, KVM_REG_ARM64_SYSREG_CRM_MASK, KVM_REG_ARM64_SYSREG_CRN_MASK,
KVM_REG_ARM64_SYSREG_OP0_MASK, KVM_REG_ARM64_SYSREG_OP1_MASK, KVM_REG_ARM64_SYSREG_OP2_MASK,
KVM_REG_ARM_CORE, KVM_REG_SIZE_U128, KVM_REG_SIZE_U32, KVM_REG_SIZE_U64,
};
pub use kvm_ioctls;
pub use kvm_ioctls::{Cap, Kvm};
Expand Down Expand Up @@ -1582,39 +1584,113 @@ impl cpu::Vcpu for KvmVcpu {

Ok(())
}
#[cfg(target_arch = "x86_64")]
///
/// Sets debug registers to set hardware breakpoints and/or enable single step.
///
fn set_guest_debug(
&self,
addrs: &[vm_memory::GuestAddress],
breakpoints: &[vm_memory::GuestAddress],
_watchpoints: &[(vm_memory::GuestAddress, u64, WatchKind)],
singlestep: bool,
) -> cpu::Result<()> {
if addrs.len() > 4 {
if breakpoints.len() > 4 {
return Err(cpu::HypervisorCpuError::SetDebugRegs(anyhow!(
"Support 4 breakpoints at most but {} addresses are passed",
addrs.len()
breakpoints.len()
)));
}

let mut dbg = kvm_guest_debug {
#[cfg(target_arch = "x86_64")]
control: KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP,
#[cfg(target_arch = "aarch64")]
control: KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW,
..Default::default()
};
if singlestep {
dbg.control |= KVM_GUESTDBG_SINGLESTEP;
}

// Set bits 9 and 10.
// bit 9: GE (global exact breakpoint enable) flag.
// bit 10: always 1.
dbg.arch.debugreg[7] = 0x0600;
// Breakpoints
#[cfg(target_arch = "x86_64")]
{
// Set bits 9 and 10.
// bit 9: GE (global exact breakpoint enable) flag.
// bit 10: always 1.
dbg.arch.debugreg[7] = 0x0600;

for (i, addr) in breakpoints.iter().enumerate() {
dbg.arch.debugreg[i] = addr.0;
// Set global breakpoint enable flag
dbg.arch.debugreg[7] |= 2 << (i * 2);
}
}
#[cfg(target_arch = "aarch64")]
{
for (i, addr) in breakpoints.iter().enumerate() {
// DBGBCR_EL1 (Debug Breakpoint Control Registers, D13.3.2):
// bit 0: 1 (Enabled)
// bit 1~2: 0b11 (PMC = EL1/EL0)
// bit 5~8: 0b1111 (BAS = AArch64)
// others: 0
dbg.arch.dbg_bcr[i] = 0b1u64 | 0b110u64 | 0b1_1110_0000u64;
// DBGBVR_EL1 (Debug Breakpoint Value Registers, D13.3.3):
// bit 2~52: VA[2:52]
dbg.arch.dbg_bvr[i] = (!0u64 >> 11) & addr.0;
}
}

for (i, addr) in addrs.iter().enumerate() {
dbg.arch.debugreg[i] = addr.0;
// Set global breakpoint enable flag
dbg.arch.debugreg[7] |= 2 << (i * 2);
// Watchpoints
#[cfg(target_arch = "aarch64")]
{
for (i, watchpoint) in _watchpoints.iter().enumerate() {
// DBGWVR_EL1 (Debug Watchpoint Value Registers, D13.3.12):
// bit 2~63: VA[2:63]
dbg.arch.dbg_wvr[i] = watchpoint.0 .0;
// DBGWCR_EL1 (Debug Watchpoint Control Registers, D13.3.11):
// bit 0: 1 (Enabled)
debug!("set_guest_debug: wvr = 0x{:x}", dbg.arch.dbg_wvr[i]);
dbg.arch.dbg_wcr[i] = 0b1u64;
// bit 1~2: 0b11 (PAC = EL1/EL0)
dbg.arch.dbg_wcr[i] |= 0b110u64;
// bit 3~4: LCS
// 0b01: Watch loading
// 0b10: Watch saving
// 0b11: Watch loading & saving
debug!("set_guest_debug: kind = {:#?}", watchpoint.2);
dbg.arch.dbg_wcr[i] |= match watchpoint.2 {
WatchKind::Read => 0b01000u64,
WatchKind::Write => 0b10000u64,
WatchKind::ReadWrite => 0b11000u64,
};

// Length to watch
let len: u64 = watchpoint.1;
debug!("set_guest_debug: len = {}", len);
if len <= 8 {
// If the watched length is no more than 8, it is set in
// bit 5~12: BAS
let bas = ((1u64 << len) - 1) << 5;
dbg.arch.dbg_wcr[i] |= bas;
debug!("set_guest_debug: bas = 0x{:x}", bas);
} else {
// If the watched length is more than 8 (must be power of 2),
// it is set in MASK:
// bit 24~28: length in address bits
if len.is_power_of_two() {
let mask = len.trailing_zeros() as u64;
dbg.arch.dbg_wcr[i] |= mask << 24;
dbg.arch.dbg_wvr[i] &= !((1u64 << mask) - 1);
debug!("set_guest_debug: mask = {}", mask);
debug!("set_guest_debug: wvr = 0x{:x}", dbg.arch.dbg_wvr[i]);
} else {
return Err(cpu::HypervisorCpuError::SetDebugRegs(anyhow!(
"Watched memory length must be power of 2: {}",
len
)));
}
}
}
}

self.fd
Expand Down
1 change: 0 additions & 1 deletion hypervisor/src/lib.rs
Expand Up @@ -22,7 +22,6 @@

#[macro_use]
extern crate anyhow;
#[cfg(target_arch = "x86_64")]
#[macro_use]
extern crate log;

Expand Down
2 changes: 1 addition & 1 deletion vmm/Cargo.toml
Expand Up @@ -27,7 +27,7 @@ devices = { path = "../devices" }
epoll = "4.3.1"
event_monitor = { path = "../event_monitor" }
gdbstub = { version = "0.6.2", optional = true }
gdbstub_arch = { version = "0.2.3", optional = true }
gdbstub_arch = { git = "https://github.com/michael2012z/gdbstub_arch_test.git", branch = "main", optional = true }
hypervisor = { path = "../hypervisor" }
libc = "0.2.129"
linux-loader = { version = "0.4.0", features = ["elf", "bzimage", "pe"] }
Expand Down