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cranelift: Move VReg aliases to VRegAllocator #8493

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merged 1 commit into from Apr 29, 2024

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jameysharp
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Now that #8486 landed, allowing us to resolve aliases in machine instructions, we have ensured that all VReg aliases are resolved by the time we're done building the VCode. Therefore we only need to keep track of the aliases map before that.

The VReg allocator is also dropped when we finish building the VCode, and it makes sense to track aliases there. This lets us maintain an invariant, that PCC facts are only stored on VRegs which are not aliased, while only reasoning locally within VRegAllocator.

I've changed the trace-log output to print the VCode immediately before it's finalized, along with key details in the VRegAllocator. This allows seeing the instructions before aliases are rewritten, although they're in reverse order at that point. There's another trace-log message somewhere else which logs the finalized VCode, so you can see both.

Previously, the initial capacity of the vreg_aliases map was set to ten times the number of basic blocks in the function. However we can make a better estimate based on the number of SSA values in the function, and use that to preallocate storage for other things in VRegAllocator too.

Keeping the aliases outside the VCode fixes previous borrow-checker challenges, which is a nice bonus.

Now that bytecodealliance#8486 landed, allowing us to resolve aliases in machine
instructions, we have ensured that all VReg aliases are resolved by the
time we're done building the VCode. Therefore we only need to keep track
of the aliases map before that.

The VReg allocator is also dropped when we finish building the VCode,
and it makes sense to track aliases there. This lets us maintain an
invariant, that PCC facts are only stored on VRegs which are not
aliased, while only reasoning locally within VRegAllocator.

I've changed the trace-log output to print the VCode immediately before
it's finalized, along with key details in the VRegAllocator. This allows
seeing the instructions before aliases are rewritten, although they're
in reverse order at that point. There's another trace-log message
somewhere else which logs the finalized VCode, so you can see both.

Previously, the initial capacity of the vreg_aliases map was set to ten
times the number of basic blocks in the function. However we can make a
better estimate based on the number of SSA values in the function, and
use that to preallocate storage for other things in VRegAllocator too.

Keeping the aliases outside the VCode fixes previous borrow-checker
challenges, which is a nice bonus.
@jameysharp jameysharp requested a review from a team as a code owner April 27, 2024 01:55
@jameysharp jameysharp requested review from cfallin and removed request for a team April 27, 2024 01:55
@github-actions github-actions bot added cranelift Issues related to the Cranelift code generator cranelift:area:machinst Issues related to instruction selection and the new MachInst backend. labels Apr 27, 2024
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This is a really nice simplification -- thanks and LGTM!

@jameysharp jameysharp added this pull request to the merge queue Apr 29, 2024
Merged via the queue into bytecodealliance:main with commit 3aa3206 Apr 29, 2024
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@jameysharp jameysharp deleted the move-vreg-aliases branch April 29, 2024 17:50
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2 participants