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Switch from llvm_asm!() to new asm!() macro #304

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merged 2 commits into from Nov 16, 2021
Merged

Switch from llvm_asm!() to new asm!() macro #304

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4c561d8
Switch from llvm_asm!() to new asm!() macro
coolreader18 Nov 11, 2021
f35f0b4
Use :e registers on x32
coolreader18 Nov 11, 2021
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76 changes: 34 additions & 42 deletions src/elision.rs
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Expand Up @@ -52,33 +52,28 @@ impl AtomicElisionExt for AtomicUsize {
impl AtomicElisionExt for AtomicUsize {
type IntType = usize;

#[cfg(target_pointer_width = "32")]
#[inline]
fn elision_compare_exchange_acquire(&self, current: usize, new: usize) -> Result<usize, usize> {
unsafe {
let prev: usize;
llvm_asm!("xacquire; lock; cmpxchgl $2, $1"
: "={eax}" (prev), "+*m" (self)
: "r" (new), "{eax}" (current)
: "memory"
: "volatile");
if prev == current {
Ok(prev)
} else {
Err(prev)
}
}
}
#[cfg(target_pointer_width = "64")]
#[inline]
fn elision_compare_exchange_acquire(&self, current: usize, new: usize) -> Result<usize, usize> {
unsafe {
let prev: usize;
llvm_asm!("xacquire; lock; cmpxchgq $2, $1"
: "={rax}" (prev), "+*m" (self)
: "r" (new), "{rax}" (current)
: "memory"
: "volatile");
#[cfg(target_pointer_width = "32")]
asm!(
"xacquire",
"lock",
"cmpxchg [{:e}], {:e}",
in(reg) self,
in(reg) new,
inout("eax") current => prev,
);
#[cfg(target_pointer_width = "64")]
asm!(
"xacquire",
"lock",
"cmpxchg [{}], {}",
in(reg) self,
in(reg) new,
inout("rax") current => prev,
);
if prev == current {
Ok(prev)
} else {
Expand All @@ -87,29 +82,26 @@ impl AtomicElisionExt for AtomicUsize {
}
}

#[cfg(target_pointer_width = "32")]
#[inline]
fn elision_fetch_sub_release(&self, val: usize) -> usize {
unsafe {
let prev: usize;
llvm_asm!("xrelease; lock; xaddl $2, $1"
: "=r" (prev), "+*m" (self)
: "0" (val.wrapping_neg())
: "memory"
: "volatile");
prev
}
}
#[cfg(target_pointer_width = "64")]
#[inline]
fn elision_fetch_sub_release(&self, val: usize) -> usize {
unsafe {
let prev: usize;
llvm_asm!("xrelease; lock; xaddq $2, $1"
: "=r" (prev), "+*m" (self)
: "0" (val.wrapping_neg())
: "memory"
: "volatile");
#[cfg(target_pointer_width = "32")]
asm!(
"xrelease",
"lock",
"xadd [{:e}], {:e}",
in(reg) self,
inout(reg) val.wrapping_neg() => prev,
);
#[cfg(target_pointer_width = "64")]
asm!(
"xrelease",
"lock",
"xadd [{}], {}",
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You also need :e here for 32-bit pointer size.

in(reg) self,
inout(reg) val.wrapping_neg() => prev,
);
prev
}
}
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2 changes: 1 addition & 1 deletion src/lib.rs
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Expand Up @@ -11,7 +11,7 @@

#![warn(missing_docs)]
#![warn(rust_2018_idioms)]
#![cfg_attr(feature = "nightly", feature(llvm_asm))]
#![cfg_attr(feature = "nightly", feature(asm))]

mod condvar;
mod elision;
Expand Down