Support SSE 4.2 for the Singlepass compiler #2775
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…tween different simd instruction sets. Partial work on supporting SSE4.2
…s. Added >= SSE 4.1 implementation for emit_vblendvpd. Added some TODOs
ptitSeb
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Jan 31, 2022
…ns. Changed the roundss/sd function
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2775: Support SSE 4.2 for the Singlepass compiler r=ptitSeb a=batconjurer Closes #2767 # Description This PR adds support for the SSE 4.2 instruction set in the singlepass compiler. Previously, only AVX was supported. This implementation may also work for SSE 4.1, but this should be double checked. It does use the `blendvps` instruction indroduced in SSE 4.1, so it cannot support any earlier SSE versions at present for sure. The following are the main changes: - The assembler has changed from a Vec<X64Relocation> to a struct containing this as well as the corresponding CPU feature (indicating AVX/SSE4.2/...) - A set of SSE function macros have been added. To handle non-destructive operations, additional moves may be made before executing the corresponding SSE instruction if `src1 != dst` - A minor change to the `EmitterX64` trait. It now has a function for returning a possible CPU feature. - The implementation of `EmitterX64` for the assembler has obviously changed. It chooses the emitted assembly based on the CPU feature. Co-authored-by: R2D2 <jacob.turner870@gmail.com> Co-authored-by: Jacob Turner <jacob.turner870@gmail.com>
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Closes #2767
Description
This PR adds support for the SSE 4.2 instruction set in the singlepass compiler. Previously, only AVX was supported. This implementation may also work for SSE 4.1, but this should be double checked. It does use the
blendvpsinstruction indroduced in SSE 4.1, so it cannot support any earlier SSE versions at present for sure.The following are the main changes:
src1 != dstEmitterX64trait. It now has a function for returning a possible CPU feature.EmitterX64for the assembler has obviously changed. It chooses the emitted assembly based on the CPU feature.