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Correct bit offset for enabling TIM3 in RCC/APB1ENR #297

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merged 1 commit into from Oct 26, 2019

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osannolik
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The bit offset for enabling the clock for TIM3 in RCC is incorrect for stm32l0x1 targets. It should be bit 1 instead of bit 2.

Tested on an stm32l051.

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Thanks!

bors r+

bors bot added a commit that referenced this pull request Oct 26, 2019
297: Correct bit offset for enabling TIM3 in RCC/APB1ENR r=adamgreig a=osannolik

The bit offset for enabling the clock for TIM3 in RCC is incorrect for stm32l0x1 targets. It should be bit 1 instead of bit 2. 

Tested on an stm32l051. 

Co-authored-by: Jonas <osannolik@godtycklig.se>
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bors bot commented Oct 26, 2019

Build succeeded

@bors bors bot merged commit 79fe988 into stm32-rs:master Oct 26, 2019
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