libbpf: usdt: unrecognized register 'v0' on aarch64

[0xB10C]

On aarch64, systemtap sometimes generates probes like -8@v0. Currently, libbpf only handles e.g. 8@x24. Support for v%d is needed.

libbpf/src/usdt.c

Lines 1373 to 1379 in 46eafba

	if (sscanf(reg_name, "x%d", &reg_num) == 1) {
	if (reg_num >= 0 && reg_num < 31)
	return offsetof(struct user_pt_regs, regs[reg_num]);
	} else if (strcmp(reg_name, "sp") == 0) {
	return offsetof(struct user_pt_regs, sp);
	}
	pr_warn("usdt: unrecognized register '%s'\n", reg_name);

I currently don't have time to work on this. Opening an issue here makes it easier for others with this problem to find this.

[0xB10C]

This let me use the -8@v0 arguments on aarch64.

diff --git a/src/usdt.c b/src/usdt.c
index d18e37982..25048455a 100644
--- a/src/usdt.c
+++ b/src/usdt.c
@@ -1339,6 +1339,9 @@ static int calc_pt_regs_off(const char *reg_name)
 	if (sscanf(reg_name, "x%d", &reg_num) == 1) {
 		if (reg_num >= 0 && reg_num < 31)
 			return offsetof(struct user_pt_regs, regs[reg_num]);
+	} else if (sscanf(reg_name, "v%d", &reg_num) == 1) {
+ 		if (reg_num >= 0 && reg_num < 31)
+			return offsetof(struct user_pt_regs, regs[reg_num]);
 	} else if (strcmp(reg_name, "sp") == 0) {
 		return offsetof(struct user_pt_regs, sp);
 	}

I haven't send a patch upstream yet and might not get to it in the near future. If someone wants to pick this up in the meantime, feel free to do so.

[anakryiko]

This let me use the -8@v0 arguments on aarch64.

Does it do the right thing, though? Is x0 and v0 the same register?

[0xB10C]

This let me use the -8@v0 arguments on aarch64.

Does it do the right thing, though? Is x0 and v0 the same register?

Hm, right. I doesn't seem like it https://developer.arm.com/documentation/102374/0101/Registers-in-AArch64---general-purpose-registers

There is a separate set of 32 registers used for floating point and vector operations.

Seems like v0 is a vector register which are not the same as x registers. I'll investigate.