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What do these changes do?
This PR replaces the
eor
to zero the vector register with amovi
instruction to simplify the macro a bit. The A72 optimisation guide lists thateor
andmovi
have the same latency and throughput numbers so the performance should be equivalent.How Has This Been Tested?
CI
Benchmark Results
I briefly ran some benchmarks on my phone and couldn't measure any difference.
Related issue number
Followup on #496 (comment)