diff --git a/cpuid.go b/cpuid.go
index 27f3325..b51622c 100644
--- a/cpuid.go
+++ b/cpuid.go
@@ -110,8 +110,10 @@ const (
 	ENQCMD                              // Enqueue Command
 	ERMS                                // Enhanced REP MOVSB/STOSB
 	F16C                                // Half-precision floating-point conversion
+	FLUSH_L1D                           // Flush L1D cache
 	FMA3                                // Intel FMA 3. Does not imply AVX.
 	FMA4                                // Bulldozer FMA4 functions
+	FSRM                                // Fast Short Rep Mov
 	FXSR                                // FXSAVE, FXRESTOR instructions, CR4 bit 9
 	FXSROPT                             // FXSAVE/FXRSTOR optimizations
 	GFNI                                // Galois Field New Instructions. May require other features (AVX, AVX512VL,AVX512F) based on usage.
@@ -119,7 +121,10 @@ const (
 	HRESET                              // If set CPU supports history reset and the IA32_HRESET_ENABLE MSR
 	HTT                                 // Hyperthreading (enabled)
 	HWA                                 // Hardware assert supported. Indicates support for MSRC001_10
+	HYBRID_CPU                          // This part has CPUs of more than one type.
 	HYPERVISOR                          // This bit has been reserved by Intel & AMD for use by hypervisors
+	IA32_ARCH_CAP                       // IA32_ARCH_CAPABILITIES MSR (Intel)
+	IA32_CORE_CAP                       // IA32_CORE_CAPABILITIES MSR
 	IBPB                                // Indirect Branch Restricted Speculation (IBRS) and Indirect Branch Predictor Barrier (IBPB)
 	IBS                                 // Instruction Based Sampling (AMD)
 	IBSBRNTRGT                          // Instruction Based Sampling Feature (AMD)
@@ -138,7 +143,9 @@ const (
 	LBRVIRT                             // LBR virtualization
 	LZCNT                               // LZCNT instruction
 	MCAOVERFLOW                         // MCA overflow recovery support.
+	MCDT_NO                             // Processor do not exhibit MXCSR Configuration Dependent Timing behavior and do not need to mitigate it.
 	MCOMMIT                             // MCOMMIT instruction supported
+	MD_CLEAR                            // VERW clears CPU buffers
 	MMX                                 // standard MMX
 	MMXEXT                              // SSE integer functions or AMD MMX ext
 	MOVBE                               // MOVBE instruction (big-endian)
@@ -172,6 +179,8 @@ const (
 	SHA                                 // Intel SHA Extensions
 	SME                                 // AMD Secure Memory Encryption supported
 	SME_COHERENT                        // AMD Hardware cache coherency across encryption domains enforced
+	SPEC_CTRL_SSBD                      // Speculative Store Bypass Disable
+	SRBDS_CTRL                          // SRBDS mitigation MSR available
 	SSE                                 // SSE functions
 	SSE2                                // P4 SSE functions
 	SSE3                                // Prescott SSE3 functions
@@ -192,8 +201,8 @@ const (
 	SYSCALL                             // System-Call Extension (SCE): SYSCALL and SYSRET instructions.
 	SYSEE                               // SYSENTER and SYSEXIT instructions
 	TBM                                 // AMD Trailing Bit Manipulation
-	TOPEXT                              // TopologyExtensions: topology extensions support. Indicates support for CPUID Fn8000_001D_EAX_x[N:0]-CPUID Fn8000_001E_EDX.
 	TME                                 // Intel Total Memory Encryption. The following MSRs are supported: IA32_TME_CAPABILITY, IA32_TME_ACTIVATE, IA32_TME_EXCLUDE_MASK, and IA32_TME_EXCLUDE_BASE.
+	TOPEXT                              // TopologyExtensions: topology extensions support. Indicates support for CPUID Fn8000_001D_EAX_x[N:0]-CPUID Fn8000_001E_EDX.
 	TSCRATEMSR                          // MSR based TSC rate control. Indicates support for MSR TSC ratio MSRC000_0104
 	TSXLDTRK                            // Intel TSX Suspend Load Address Tracking
 	VAES                                // Vector AES. AVX(512) versions requires additional checks.
@@ -1093,13 +1102,21 @@ func support() flagSet {
 		fs.setIf(ecx&(1<<30) != 0, SGXLC)
 
 		// CPUID.(EAX=7, ECX=0).EDX
+		fs.setIf(edx&(1<<4) != 0, FSRM)
+		fs.setIf(edx&(1<<9) != 0, SRBDS_CTRL)
+		fs.setIf(edx&(1<<10) != 0, MD_CLEAR)
 		fs.setIf(edx&(1<<11) != 0, RTM_ALWAYS_ABORT)
 		fs.setIf(edx&(1<<14) != 0, SERIALIZE)
+		fs.setIf(edx&(1<<15) != 0, HYBRID_CPU)
 		fs.setIf(edx&(1<<16) != 0, TSXLDTRK)
 		fs.setIf(edx&(1<<18) != 0, PCONFIG)
 		fs.setIf(edx&(1<<20) != 0, CETIBT)
 		fs.setIf(edx&(1<<26) != 0, IBPB)
 		fs.setIf(edx&(1<<27) != 0, STIBP)
+		fs.setIf(edx&(1<<28) != 0, FLUSH_L1D)
+		fs.setIf(edx&(1<<29) != 0, IA32_ARCH_CAP)
+		fs.setIf(edx&(1<<30) != 0, IA32_CORE_CAP)
+		fs.setIf(edx&(1<<31) != 0, SPEC_CTRL_SSBD)
 
 		// CPUID.(EAX=7, ECX=1)
 		eax1, _, _, _ := cpuidex(7, 1)
@@ -1147,7 +1164,12 @@ func support() flagSet {
 				fs.setIf(eax1&(1<<5) != 0, AVX512BF16)
 			}
 		}
+
+		// CPUID.(EAX=7, ECX=2)
+		_, _, _, edx = cpuidex(7, 2)
+		fs.setIf(edx&(1<<5) != 0, MCDT_NO)
 	}
+
 	// Processor Extended State Enumeration Sub-leaf (EAX = 0DH, ECX = 1)
 	// EAX
 	// Bit 00: XSAVEOPT is available.
diff --git a/featureid_string.go b/featureid_string.go
index d12e547..e387bfb 100644
--- a/featureid_string.go
+++ b/featureid_string.go
@@ -50,139 +50,148 @@ func _() {
 	_ = x[ENQCMD-40]
 	_ = x[ERMS-41]
 	_ = x[F16C-42]
-	_ = x[FMA3-43]
-	_ = x[FMA4-44]
-	_ = x[FXSR-45]
-	_ = x[FXSROPT-46]
-	_ = x[GFNI-47]
-	_ = x[HLE-48]
-	_ = x[HRESET-49]
-	_ = x[HTT-50]
-	_ = x[HWA-51]
-	_ = x[HYPERVISOR-52]
-	_ = x[IBPB-53]
-	_ = x[IBS-54]
-	_ = x[IBSBRNTRGT-55]
-	_ = x[IBSFETCHSAM-56]
-	_ = x[IBSFFV-57]
-	_ = x[IBSOPCNT-58]
-	_ = x[IBSOPCNTEXT-59]
-	_ = x[IBSOPSAM-60]
-	_ = x[IBSRDWROPCNT-61]
-	_ = x[IBSRIPINVALIDCHK-62]
-	_ = x[IBS_PREVENTHOST-63]
-	_ = x[INT_WBINVD-64]
-	_ = x[INVLPGB-65]
-	_ = x[LAHF-66]
-	_ = x[LAM-67]
-	_ = x[LBRVIRT-68]
-	_ = x[LZCNT-69]
-	_ = x[MCAOVERFLOW-70]
-	_ = x[MCOMMIT-71]
-	_ = x[MMX-72]
-	_ = x[MMXEXT-73]
-	_ = x[MOVBE-74]
-	_ = x[MOVDIR64B-75]
-	_ = x[MOVDIRI-76]
-	_ = x[MOVSB_ZL-77]
-	_ = x[MPX-78]
-	_ = x[MSRIRC-79]
-	_ = x[MSR_PAGEFLUSH-80]
-	_ = x[NRIPS-81]
-	_ = x[NX-82]
-	_ = x[OSXSAVE-83]
-	_ = x[PCONFIG-84]
-	_ = x[POPCNT-85]
-	_ = x[RDPRU-86]
-	_ = x[RDRAND-87]
-	_ = x[RDSEED-88]
-	_ = x[RDTSCP-89]
-	_ = x[RTM-90]
-	_ = x[RTM_ALWAYS_ABORT-91]
-	_ = x[SERIALIZE-92]
-	_ = x[SEV-93]
-	_ = x[SEV_64BIT-94]
-	_ = x[SEV_ALTERNATIVE-95]
-	_ = x[SEV_DEBUGSWAP-96]
-	_ = x[SEV_ES-97]
-	_ = x[SEV_RESTRICTED-98]
-	_ = x[SEV_SNP-99]
-	_ = x[SGX-100]
-	_ = x[SGXLC-101]
-	_ = x[SHA-102]
-	_ = x[SME-103]
-	_ = x[SME_COHERENT-104]
-	_ = x[SSE-105]
-	_ = x[SSE2-106]
-	_ = x[SSE3-107]
-	_ = x[SSE4-108]
-	_ = x[SSE42-109]
-	_ = x[SSE4A-110]
-	_ = x[SSSE3-111]
-	_ = x[STIBP-112]
-	_ = x[STOSB_SHORT-113]
-	_ = x[SUCCOR-114]
-	_ = x[SVM-115]
-	_ = x[SVMDA-116]
-	_ = x[SVMFBASID-117]
-	_ = x[SVML-118]
-	_ = x[SVMNP-119]
-	_ = x[SVMPF-120]
-	_ = x[SVMPFT-121]
-	_ = x[SYSCALL-122]
-	_ = x[SYSEE-123]
-	_ = x[TBM-124]
-	_ = x[TOPEXT-125]
-	_ = x[TME-126]
-	_ = x[TSCRATEMSR-127]
-	_ = x[TSXLDTRK-128]
-	_ = x[VAES-129]
-	_ = x[VMCBCLEAN-130]
-	_ = x[VMPL-131]
-	_ = x[VMSA_REGPROT-132]
-	_ = x[VMX-133]
-	_ = x[VPCLMULQDQ-134]
-	_ = x[VTE-135]
-	_ = x[WAITPKG-136]
-	_ = x[WBNOINVD-137]
-	_ = x[X87-138]
-	_ = x[XGETBV1-139]
-	_ = x[XOP-140]
-	_ = x[XSAVE-141]
-	_ = x[XSAVEC-142]
-	_ = x[XSAVEOPT-143]
-	_ = x[XSAVES-144]
-	_ = x[AESARM-145]
-	_ = x[ARMCPUID-146]
-	_ = x[ASIMD-147]
-	_ = x[ASIMDDP-148]
-	_ = x[ASIMDHP-149]
-	_ = x[ASIMDRDM-150]
-	_ = x[ATOMICS-151]
-	_ = x[CRC32-152]
-	_ = x[DCPOP-153]
-	_ = x[EVTSTRM-154]
-	_ = x[FCMA-155]
-	_ = x[FP-156]
-	_ = x[FPHP-157]
-	_ = x[GPA-158]
-	_ = x[JSCVT-159]
-	_ = x[LRCPC-160]
-	_ = x[PMULL-161]
-	_ = x[SHA1-162]
-	_ = x[SHA2-163]
-	_ = x[SHA3-164]
-	_ = x[SHA512-165]
-	_ = x[SM3-166]
-	_ = x[SM4-167]
-	_ = x[SVE-168]
-	_ = x[lastID-169]
+	_ = x[FLUSH_L1D-43]
+	_ = x[FMA3-44]
+	_ = x[FMA4-45]
+	_ = x[FSRM-46]
+	_ = x[FXSR-47]
+	_ = x[FXSROPT-48]
+	_ = x[GFNI-49]
+	_ = x[HLE-50]
+	_ = x[HRESET-51]
+	_ = x[HTT-52]
+	_ = x[HWA-53]
+	_ = x[HYBRID_CPU-54]
+	_ = x[HYPERVISOR-55]
+	_ = x[IA32_ARCH_CAP-56]
+	_ = x[IA32_CORE_CAP-57]
+	_ = x[IBPB-58]
+	_ = x[IBS-59]
+	_ = x[IBSBRNTRGT-60]
+	_ = x[IBSFETCHSAM-61]
+	_ = x[IBSFFV-62]
+	_ = x[IBSOPCNT-63]
+	_ = x[IBSOPCNTEXT-64]
+	_ = x[IBSOPSAM-65]
+	_ = x[IBSRDWROPCNT-66]
+	_ = x[IBSRIPINVALIDCHK-67]
+	_ = x[IBS_PREVENTHOST-68]
+	_ = x[INT_WBINVD-69]
+	_ = x[INVLPGB-70]
+	_ = x[LAHF-71]
+	_ = x[LAM-72]
+	_ = x[LBRVIRT-73]
+	_ = x[LZCNT-74]
+	_ = x[MCAOVERFLOW-75]
+	_ = x[MCDT_NO-76]
+	_ = x[MCOMMIT-77]
+	_ = x[MD_CLEAR-78]
+	_ = x[MMX-79]
+	_ = x[MMXEXT-80]
+	_ = x[MOVBE-81]
+	_ = x[MOVDIR64B-82]
+	_ = x[MOVDIRI-83]
+	_ = x[MOVSB_ZL-84]
+	_ = x[MPX-85]
+	_ = x[MSRIRC-86]
+	_ = x[MSR_PAGEFLUSH-87]
+	_ = x[NRIPS-88]
+	_ = x[NX-89]
+	_ = x[OSXSAVE-90]
+	_ = x[PCONFIG-91]
+	_ = x[POPCNT-92]
+	_ = x[RDPRU-93]
+	_ = x[RDRAND-94]
+	_ = x[RDSEED-95]
+	_ = x[RDTSCP-96]
+	_ = x[RTM-97]
+	_ = x[RTM_ALWAYS_ABORT-98]
+	_ = x[SERIALIZE-99]
+	_ = x[SEV-100]
+	_ = x[SEV_64BIT-101]
+	_ = x[SEV_ALTERNATIVE-102]
+	_ = x[SEV_DEBUGSWAP-103]
+	_ = x[SEV_ES-104]
+	_ = x[SEV_RESTRICTED-105]
+	_ = x[SEV_SNP-106]
+	_ = x[SGX-107]
+	_ = x[SGXLC-108]
+	_ = x[SHA-109]
+	_ = x[SME-110]
+	_ = x[SME_COHERENT-111]
+	_ = x[SPEC_CTRL_SSBD-112]
+	_ = x[SRBDS_CTRL-113]
+	_ = x[SSE-114]
+	_ = x[SSE2-115]
+	_ = x[SSE3-116]
+	_ = x[SSE4-117]
+	_ = x[SSE42-118]
+	_ = x[SSE4A-119]
+	_ = x[SSSE3-120]
+	_ = x[STIBP-121]
+	_ = x[STOSB_SHORT-122]
+	_ = x[SUCCOR-123]
+	_ = x[SVM-124]
+	_ = x[SVMDA-125]
+	_ = x[SVMFBASID-126]
+	_ = x[SVML-127]
+	_ = x[SVMNP-128]
+	_ = x[SVMPF-129]
+	_ = x[SVMPFT-130]
+	_ = x[SYSCALL-131]
+	_ = x[SYSEE-132]
+	_ = x[TBM-133]
+	_ = x[TME-134]
+	_ = x[TOPEXT-135]
+	_ = x[TSCRATEMSR-136]
+	_ = x[TSXLDTRK-137]
+	_ = x[VAES-138]
+	_ = x[VMCBCLEAN-139]
+	_ = x[VMPL-140]
+	_ = x[VMSA_REGPROT-141]
+	_ = x[VMX-142]
+	_ = x[VPCLMULQDQ-143]
+	_ = x[VTE-144]
+	_ = x[WAITPKG-145]
+	_ = x[WBNOINVD-146]
+	_ = x[X87-147]
+	_ = x[XGETBV1-148]
+	_ = x[XOP-149]
+	_ = x[XSAVE-150]
+	_ = x[XSAVEC-151]
+	_ = x[XSAVEOPT-152]
+	_ = x[XSAVES-153]
+	_ = x[AESARM-154]
+	_ = x[ARMCPUID-155]
+	_ = x[ASIMD-156]
+	_ = x[ASIMDDP-157]
+	_ = x[ASIMDHP-158]
+	_ = x[ASIMDRDM-159]
+	_ = x[ATOMICS-160]
+	_ = x[CRC32-161]
+	_ = x[DCPOP-162]
+	_ = x[EVTSTRM-163]
+	_ = x[FCMA-164]
+	_ = x[FP-165]
+	_ = x[FPHP-166]
+	_ = x[GPA-167]
+	_ = x[JSCVT-168]
+	_ = x[LRCPC-169]
+	_ = x[PMULL-170]
+	_ = x[SHA1-171]
+	_ = x[SHA2-172]
+	_ = x[SHA3-173]
+	_ = x[SHA512-174]
+	_ = x[SM3-175]
+	_ = x[SM4-176]
+	_ = x[SVE-177]
+	_ = x[lastID-178]
 	_ = x[firstID-0]
 }
 
-const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXINT8AMXTILEAVXAVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512FP16AVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXSLOWAVXVNNIBMI1BMI2CETIBTCETSSCLDEMOTECLMULCLZEROCMOVCMPSB_SCADBS_SHORTCMPXCHG8CPBOOSTCX16ENQCMDERMSF16CFMA3FMA4FXSRFXSROPTGFNIHLEHRESETHTTHWAHYPERVISORIBPBIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKIBS_PREVENTHOSTINT_WBINVDINVLPGBLAHFLAMLBRVIRTLZCNTMCAOVERFLOWMCOMMITMMXMMXEXTMOVBEMOVDIR64BMOVDIRIMOVSB_ZLMPXMSRIRCMSR_PAGEFLUSHNRIPSNXOSXSAVEPCONFIGPOPCNTRDPRURDRANDRDSEEDRDTSCPRTMRTM_ALWAYS_ABORTSERIALIZESEVSEV_64BITSEV_ALTERNATIVESEV_DEBUGSWAPSEV_ESSEV_RESTRICTEDSEV_SNPSGXSGXLCSHASMESME_COHERENTSSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPSTOSB_SHORTSUCCORSVMSVMDASVMFBASIDSVMLSVMNPSVMPFSVMPFTSYSCALLSYSEETBMTOPEXTTMETSCRATEMSRTSXLDTRKVAESVMCBCLEANVMPLVMSA_REGPROTVMXVPCLMULQDQVTEWAITPKGWBNOINVDX87XGETBV1XOPXSAVEXSAVECXSAVEOPTXSAVESAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFPFPHPGPAJSCVTLRCPCPMULLSHA1SHA2SHA3SHA512SM3SM4SVElastID"
+const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXINT8AMXTILEAVXAVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512FP16AVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXSLOWAVXVNNIBMI1BMI2CETIBTCETSSCLDEMOTECLMULCLZEROCMOVCMPSB_SCADBS_SHORTCMPXCHG8CPBOOSTCX16ENQCMDERMSF16CFLUSH_L1DFMA3FMA4FSRMFXSRFXSROPTGFNIHLEHRESETHTTHWAHYBRID_CPUHYPERVISORIA32_ARCH_CAPIA32_CORE_CAPIBPBIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKIBS_PREVENTHOSTINT_WBINVDINVLPGBLAHFLAMLBRVIRTLZCNTMCAOVERFLOWMCDT_NOMCOMMITMD_CLEARMMXMMXEXTMOVBEMOVDIR64BMOVDIRIMOVSB_ZLMPXMSRIRCMSR_PAGEFLUSHNRIPSNXOSXSAVEPCONFIGPOPCNTRDPRURDRANDRDSEEDRDTSCPRTMRTM_ALWAYS_ABORTSERIALIZESEVSEV_64BITSEV_ALTERNATIVESEV_DEBUGSWAPSEV_ESSEV_RESTRICTEDSEV_SNPSGXSGXLCSHASMESME_COHERENTSPEC_CTRL_SSBDSRBDS_CTRLSSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPSTOSB_SHORTSUCCORSVMSVMDASVMFBASIDSVMLSVMNPSVMPFSVMPFTSYSCALLSYSEETBMTMETOPEXTTSCRATEMSRTSXLDTRKVAESVMCBCLEANVMPLVMSA_REGPROTVMXVPCLMULQDQVTEWAITPKGWBNOINVDX87XGETBV1XOPXSAVEXSAVECXSAVEOPTXSAVESAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFPFPHPGPAJSCVTLRCPCPMULLSHA1SHA2SHA3SHA512SM3SM4SVElastID"
 
-var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 58, 62, 72, 84, 92, 100, 108, 116, 123, 133, 143, 151, 161, 172, 180, 190, 208, 223, 230, 237, 241, 245, 251, 256, 264, 269, 275, 279, 297, 305, 312, 316, 322, 326, 330, 334, 338, 342, 349, 353, 356, 362, 365, 368, 378, 382, 385, 395, 406, 412, 420, 431, 439, 451, 467, 482, 492, 499, 503, 506, 513, 518, 529, 536, 539, 545, 550, 559, 566, 574, 577, 583, 596, 601, 603, 610, 617, 623, 628, 634, 640, 646, 649, 665, 674, 677, 686, 701, 714, 720, 734, 741, 744, 749, 752, 755, 767, 770, 774, 778, 782, 787, 792, 797, 802, 813, 819, 822, 827, 836, 840, 845, 850, 856, 863, 868, 871, 877, 880, 890, 898, 902, 911, 915, 927, 930, 940, 943, 950, 958, 961, 968, 971, 976, 982, 990, 996, 1002, 1010, 1015, 1022, 1029, 1037, 1044, 1049, 1054, 1061, 1065, 1067, 1071, 1074, 1079, 1084, 1089, 1093, 1097, 1101, 1107, 1110, 1113, 1116, 1122}
+var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 58, 62, 72, 84, 92, 100, 108, 116, 123, 133, 143, 151, 161, 172, 180, 190, 208, 223, 230, 237, 241, 245, 251, 256, 264, 269, 275, 279, 297, 305, 312, 316, 322, 326, 330, 339, 343, 347, 351, 355, 362, 366, 369, 375, 378, 381, 391, 401, 414, 427, 431, 434, 444, 455, 461, 469, 480, 488, 500, 516, 531, 541, 548, 552, 555, 562, 567, 578, 585, 592, 600, 603, 609, 614, 623, 630, 638, 641, 647, 660, 665, 667, 674, 681, 687, 692, 698, 704, 710, 713, 729, 738, 741, 750, 765, 778, 784, 798, 805, 808, 813, 816, 819, 831, 845, 855, 858, 862, 866, 870, 875, 880, 885, 890, 901, 907, 910, 915, 924, 928, 933, 938, 944, 951, 956, 959, 962, 968, 978, 986, 990, 999, 1003, 1015, 1018, 1028, 1031, 1038, 1046, 1049, 1056, 1059, 1064, 1070, 1078, 1084, 1090, 1098, 1103, 1110, 1117, 1125, 1132, 1137, 1142, 1149, 1153, 1155, 1159, 1162, 1167, 1172, 1177, 1181, 1185, 1189, 1195, 1198, 1201, 1204, 1210}
 
 func (i FeatureID) String() string {
 	if i < 0 || i >= FeatureID(len(_FeatureID_index)-1) {