diff --git a/zstd/_generate/gen.go b/zstd/_generate/gen.go
index 6875900614..2ed517fcdf 100644
--- a/zstd/_generate/gen.go
+++ b/zstd/_generate/gen.go
@@ -183,6 +183,11 @@ func (o options) generateBody(name string, executeSingleTriple func(ctx *execute
 			ec.moPtr = moP
 			ec.mlPtr = mlP
 			ec.llPtr = llP
+			zero := GP64()
+			XORQ(zero, zero)
+			MOVQ(zero, moP)
+			MOVQ(zero, mlP)
+			MOVQ(zero, llP)
 
 			ec.outBase = GP64()
 			ec.outEndPtr = AllocLocal(8)
@@ -598,16 +603,6 @@ func (o options) updateLength(name string, brValue, brBitsRead, state reg.GPVirt
 		TESTQ(CX.As64(), CX.As64())
 		CMOVQEQ(CX.As64(), BX) // BX is zero if n is zero
 
-		// Check if AX is reasonable
-		assert(func(ok LabelRef) {
-			CMPQ(AX, U32(1<<28))
-			JB(ok)
-		})
-		// Check if BX is reasonable
-		assert(func(ok LabelRef) {
-			CMPQ(BX, U32(1<<28))
-			JB(ok)
-		})
 		ADDQ(BX, AX)  // AX - mo + br.getBits(moB)
 		MOVQ(AX, out) // Store result
 	}
@@ -859,19 +854,12 @@ func (o options) adjustOffsetInMemory(name string, moP, llP Mem, offsetB reg.GPV
 	// if litLen == 0 {
 	//     offset++
 	// }
+
 	{
-		if true {
-			CMPQ(llP, U32(0))
-			JNE(LabelRef(name + "_offset_maybezero"))
-			INCQ(offset)
-			JMP(LabelRef(name + "_offset_nonzero"))
-		} else {
-			// No idea why this doesn't work:
-			tmp := GP64()
-			LEAQ(Mem{Base: offset, Disp: 1}, tmp)
-			CMPQ(llP, U32(0))
-			CMOVQEQ(tmp, offset)
-		}
+		CMPQ(llP, U32(0))
+		JNE(LabelRef(name + "_offset_maybezero"))
+		INCQ(offset)
+		JMP(LabelRef(name + "_offset_nonzero"))
 
 		// if offset == 0 {
 		//     return s.prevOffset[0]
@@ -886,6 +874,22 @@ func (o options) adjustOffsetInMemory(name string, moP, llP Mem, offsetB reg.GPV
 	}
 	Label(name + "_offset_nonzero")
 	{
+		// Offset must be 1 -> 3
+		assert(func(ok LabelRef) {
+			// Test is above or equal (shouldn't be equal)
+			CMPQ(offset, U32(0))
+			JAE(ok)
+		})
+		assert(func(ok LabelRef) {
+			// Check if Above 0.
+			CMPQ(offset, U32(0))
+			JA(ok)
+		})
+		assert(func(ok LabelRef) {
+			// Check if Below or Equal to 3.
+			CMPQ(offset, U32(3))
+			JBE(ok)
+		})
 		// if offset == 3 {
 		//     temp = s.prevOffset[0] - 1
 		// } else {
diff --git a/zstd/fuzz_test.go b/zstd/fuzz_test.go
index 4b6f9f6cc8..19e77376e2 100644
--- a/zstd/fuzz_test.go
+++ b/zstd/fuzz_test.go
@@ -16,10 +16,12 @@ import (
 	"strconv"
 	"testing"
 
+	"github.com/klauspost/compress/internal/cpuinfo"
 	"github.com/klauspost/compress/zip"
 )
 
 func FuzzDecodeAll(f *testing.F) {
+	defer cpuinfo.DisableBMI2()()
 	addBytesFromZip(f, "testdata/fuzz/decode-corpus-raw.zip", true)
 	addBytesFromZip(f, "testdata/fuzz/decode-corpus-encoded.zip", false)
 	decLow, err := NewReader(nil, WithDecoderLowmem(true), WithDecoderConcurrency(2), WithDecoderMaxMemory(20<<20), WithDecoderMaxWindow(1<<20), IgnoreChecksum(true))
diff --git a/zstd/seqdec_amd64.s b/zstd/seqdec_amd64.s
index 8c0e7e5963..66dab5e613 100644
--- a/zstd/seqdec_amd64.s
+++ b/zstd/seqdec_amd64.s
@@ -63,20 +63,8 @@ sequenceDecs_decode_amd64_fill_end:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R15
-	CMPQ    AX, $0x10000000
-	JB      assert_check_0_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_0_ok_srcline_602:
-	CMPQ R15, $0x10000000
-	JB   assert_check_1_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_1_ok_srcline_607:
-	ADDQ R15, AX
-	MOVQ AX, 16(R10)
+	ADDQ    R15, AX
+	MOVQ    AX, 16(R10)
 
 	// Update match length
 	MOVQ    R8, AX
@@ -90,20 +78,8 @@ assert_check_1_ok_srcline_607:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R15
-	CMPQ    AX, $0x10000000
-	JB      assert_check_2_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_2_ok_srcline_602:
-	CMPQ R15, $0x10000000
-	JB   assert_check_3_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_3_ok_srcline_607:
-	ADDQ R15, AX
-	MOVQ AX, 8(R10)
+	ADDQ    R15, AX
+	MOVQ    AX, 8(R10)
 
 	// Fill bitreader to have enough for the remaining
 	CMPQ SI, $0x08
@@ -142,20 +118,8 @@ sequenceDecs_decode_amd64_fill_2_end:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R15
-	CMPQ    AX, $0x10000000
-	JB      assert_check_4_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_4_ok_srcline_602:
-	CMPQ R15, $0x10000000
-	JB   assert_check_5_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_5_ok_srcline_607:
-	ADDQ R15, AX
-	MOVQ AX, (R10)
+	ADDQ    R15, AX
+	MOVQ    AX, (R10)
 
 	// Fill bitreader for state updates
 	MOVQ    R14, (SP)
@@ -169,11 +133,11 @@ assert_check_5_ok_srcline_607:
 	// Update Literal Length State
 	MOVBQZX DI, R14
 	CMPQ    R14, $0x09
-	JBE     assert_check_6_ok_srcline_621
+	JBE     assert_check_0_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_6_ok_srcline_621:
+assert_check_0_ok_srcline_616:
 	SHRQ    $0x10, DI
 	MOVWQZX DI, DI
 	LEAQ    (BX)(R14*1), CX
@@ -186,32 +150,32 @@ assert_check_6_ok_srcline_621:
 	DECL    BP
 	ANDQ    BP, R15
 	CMPQ    R15, $0x00000200
-	JB      assert_check_7_ok_srcline_640
+	JB      assert_check_1_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_7_ok_srcline_640:
+assert_check_1_ok_srcline_635:
 	ADDQ R15, DI
 
 	// Load ctx.llTable
 	MOVQ ctx+16(FP), CX
 	MOVQ (CX), CX
 	CMPQ DI, $0x00000200
-	JB   assert_check_8_ok_srcline_658
+	JB   assert_check_2_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_8_ok_srcline_658:
+assert_check_2_ok_srcline_653:
 	MOVQ (CX)(DI*8), DI
 
 	// Update Match Length State
 	MOVBQZX R8, R14
 	CMPQ    R14, $0x09
-	JBE     assert_check_9_ok_srcline_621
+	JBE     assert_check_3_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_9_ok_srcline_621:
+assert_check_3_ok_srcline_616:
 	SHRQ    $0x10, R8
 	MOVWQZX R8, R8
 	LEAQ    (BX)(R14*1), CX
@@ -224,32 +188,32 @@ assert_check_9_ok_srcline_621:
 	DECL    BP
 	ANDQ    BP, R15
 	CMPQ    R15, $0x00000200
-	JB      assert_check_10_ok_srcline_640
+	JB      assert_check_4_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_10_ok_srcline_640:
+assert_check_4_ok_srcline_635:
 	ADDQ R15, R8
 
 	// Load ctx.mlTable
 	MOVQ ctx+16(FP), CX
 	MOVQ 24(CX), CX
 	CMPQ R8, $0x00000200
-	JB   assert_check_11_ok_srcline_658
+	JB   assert_check_5_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_11_ok_srcline_658:
+assert_check_5_ok_srcline_653:
 	MOVQ (CX)(R8*8), R8
 
 	// Update Offset State
 	MOVBQZX R9, R14
 	CMPQ    R14, $0x09
-	JBE     assert_check_12_ok_srcline_621
+	JBE     assert_check_6_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_12_ok_srcline_621:
+assert_check_6_ok_srcline_616:
 	SHRQ    $0x10, R9
 	MOVWQZX R9, R9
 	LEAQ    (BX)(R14*1), CX
@@ -262,22 +226,22 @@ assert_check_12_ok_srcline_621:
 	DECL    BP
 	ANDQ    BP, R15
 	CMPQ    R15, $0x00000200
-	JB      assert_check_13_ok_srcline_640
+	JB      assert_check_7_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_13_ok_srcline_640:
+assert_check_7_ok_srcline_635:
 	ADDQ R15, R9
 
 	// Load ctx.ofTable
 	MOVQ ctx+16(FP), CX
 	MOVQ 48(CX), CX
 	CMPQ R9, $0x00000200
-	JB   assert_check_14_ok_srcline_658
+	JB   assert_check_8_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_14_ok_srcline_658:
+assert_check_8_ok_srcline_653:
 	MOVQ (CX)(R9*8), R9
 
 sequenceDecs_decode_amd64_skip_update:
@@ -457,20 +421,8 @@ sequenceDecs_decode_56_amd64_fill_end:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R15
-	CMPQ    AX, $0x10000000
-	JB      assert_check_15_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_15_ok_srcline_602:
-	CMPQ R15, $0x10000000
-	JB   assert_check_16_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_16_ok_srcline_607:
-	ADDQ R15, AX
-	MOVQ AX, 16(R10)
+	ADDQ    R15, AX
+	MOVQ    AX, 16(R10)
 
 	// Update match length
 	MOVQ    R8, AX
@@ -484,20 +436,8 @@ assert_check_16_ok_srcline_607:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R15
-	CMPQ    AX, $0x10000000
-	JB      assert_check_17_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_17_ok_srcline_602:
-	CMPQ R15, $0x10000000
-	JB   assert_check_18_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_18_ok_srcline_607:
-	ADDQ R15, AX
-	MOVQ AX, 8(R10)
+	ADDQ    R15, AX
+	MOVQ    AX, 8(R10)
 
 	// Update literal length
 	MOVQ    DI, AX
@@ -511,20 +451,8 @@ assert_check_18_ok_srcline_607:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R15
-	CMPQ    AX, $0x10000000
-	JB      assert_check_19_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_19_ok_srcline_602:
-	CMPQ R15, $0x10000000
-	JB   assert_check_20_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_20_ok_srcline_607:
-	ADDQ R15, AX
-	MOVQ AX, (R10)
+	ADDQ    R15, AX
+	MOVQ    AX, (R10)
 
 	// Fill bitreader for state updates
 	MOVQ    R14, (SP)
@@ -538,11 +466,11 @@ assert_check_20_ok_srcline_607:
 	// Update Literal Length State
 	MOVBQZX DI, R14
 	CMPQ    R14, $0x09
-	JBE     assert_check_21_ok_srcline_621
+	JBE     assert_check_9_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_21_ok_srcline_621:
+assert_check_9_ok_srcline_616:
 	SHRQ    $0x10, DI
 	MOVWQZX DI, DI
 	LEAQ    (BX)(R14*1), CX
@@ -555,32 +483,32 @@ assert_check_21_ok_srcline_621:
 	DECL    BP
 	ANDQ    BP, R15
 	CMPQ    R15, $0x00000200
-	JB      assert_check_22_ok_srcline_640
+	JB      assert_check_10_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_22_ok_srcline_640:
+assert_check_10_ok_srcline_635:
 	ADDQ R15, DI
 
 	// Load ctx.llTable
 	MOVQ ctx+16(FP), CX
 	MOVQ (CX), CX
 	CMPQ DI, $0x00000200
-	JB   assert_check_23_ok_srcline_658
+	JB   assert_check_11_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_23_ok_srcline_658:
+assert_check_11_ok_srcline_653:
 	MOVQ (CX)(DI*8), DI
 
 	// Update Match Length State
 	MOVBQZX R8, R14
 	CMPQ    R14, $0x09
-	JBE     assert_check_24_ok_srcline_621
+	JBE     assert_check_12_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_24_ok_srcline_621:
+assert_check_12_ok_srcline_616:
 	SHRQ    $0x10, R8
 	MOVWQZX R8, R8
 	LEAQ    (BX)(R14*1), CX
@@ -593,32 +521,32 @@ assert_check_24_ok_srcline_621:
 	DECL    BP
 	ANDQ    BP, R15
 	CMPQ    R15, $0x00000200
-	JB      assert_check_25_ok_srcline_640
+	JB      assert_check_13_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_25_ok_srcline_640:
+assert_check_13_ok_srcline_635:
 	ADDQ R15, R8
 
 	// Load ctx.mlTable
 	MOVQ ctx+16(FP), CX
 	MOVQ 24(CX), CX
 	CMPQ R8, $0x00000200
-	JB   assert_check_26_ok_srcline_658
+	JB   assert_check_14_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_26_ok_srcline_658:
+assert_check_14_ok_srcline_653:
 	MOVQ (CX)(R8*8), R8
 
 	// Update Offset State
 	MOVBQZX R9, R14
 	CMPQ    R14, $0x09
-	JBE     assert_check_27_ok_srcline_621
+	JBE     assert_check_15_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_27_ok_srcline_621:
+assert_check_15_ok_srcline_616:
 	SHRQ    $0x10, R9
 	MOVWQZX R9, R9
 	LEAQ    (BX)(R14*1), CX
@@ -631,22 +559,22 @@ assert_check_27_ok_srcline_621:
 	DECL    BP
 	ANDQ    BP, R15
 	CMPQ    R15, $0x00000200
-	JB      assert_check_28_ok_srcline_640
+	JB      assert_check_16_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_28_ok_srcline_640:
+assert_check_16_ok_srcline_635:
 	ADDQ R15, R9
 
 	// Load ctx.ofTable
 	MOVQ ctx+16(FP), CX
 	MOVQ 48(CX), CX
 	CMPQ R9, $0x00000200
-	JB   assert_check_29_ok_srcline_658
+	JB   assert_check_17_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_29_ok_srcline_658:
+assert_check_17_ok_srcline_653:
 	MOVQ (CX)(R9*8), R9
 
 sequenceDecs_decode_56_amd64_skip_update:
@@ -905,11 +833,11 @@ sequenceDecs_decode_bmi2_fill_2_end:
 	MOVQ ctx+16(FP), CX
 	MOVQ 48(CX), CX
 	CMPQ R8, $0x00000200
-	JB   assert_check_30_ok_srcline_691
+	JB   assert_check_18_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_30_ok_srcline_691:
+assert_check_18_ok_srcline_686:
 	MOVQ (CX)(R8*8), R8
 
 	// Update Match Length State
@@ -923,11 +851,11 @@ assert_check_30_ok_srcline_691:
 	MOVQ ctx+16(FP), CX
 	MOVQ 24(CX), CX
 	CMPQ DI, $0x00000200
-	JB   assert_check_31_ok_srcline_691
+	JB   assert_check_19_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_31_ok_srcline_691:
+assert_check_19_ok_srcline_686:
 	MOVQ (CX)(DI*8), DI
 
 	// Update Literal Length State
@@ -940,11 +868,11 @@ assert_check_31_ok_srcline_691:
 	MOVQ ctx+16(FP), CX
 	MOVQ (CX), CX
 	CMPQ SI, $0x00000200
-	JB   assert_check_32_ok_srcline_691
+	JB   assert_check_20_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_32_ok_srcline_691:
+assert_check_20_ok_srcline_686:
 	MOVQ (CX)(SI*8), SI
 
 sequenceDecs_decode_bmi2_skip_update:
@@ -1178,11 +1106,11 @@ sequenceDecs_decode_56_bmi2_fill_end:
 	MOVQ ctx+16(FP), CX
 	MOVQ 48(CX), CX
 	CMPQ R8, $0x00000200
-	JB   assert_check_33_ok_srcline_691
+	JB   assert_check_21_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_33_ok_srcline_691:
+assert_check_21_ok_srcline_686:
 	MOVQ (CX)(R8*8), R8
 
 	// Update Match Length State
@@ -1196,11 +1124,11 @@ assert_check_33_ok_srcline_691:
 	MOVQ ctx+16(FP), CX
 	MOVQ 24(CX), CX
 	CMPQ DI, $0x00000200
-	JB   assert_check_34_ok_srcline_691
+	JB   assert_check_22_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_34_ok_srcline_691:
+assert_check_22_ok_srcline_686:
 	MOVQ (CX)(DI*8), DI
 
 	// Update Literal Length State
@@ -1213,11 +1141,11 @@ assert_check_34_ok_srcline_691:
 	MOVQ ctx+16(FP), CX
 	MOVQ (CX), CX
 	CMPQ SI, $0x00000200
-	JB   assert_check_35_ok_srcline_691
+	JB   assert_check_23_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_35_ok_srcline_691:
+assert_check_23_ok_srcline_686:
 	MOVQ (CX)(SI*8), SI
 
 sequenceDecs_decode_56_bmi2_skip_update:
@@ -1395,21 +1323,21 @@ check_offset:
 	SUBQ  DI, R11
 	JLS   copy_match
 	TESTQ R10, R10
-	JNZ   assert_check_36_ok_srcline_1166
+	JNZ   assert_check_24_ok_srcline_1171
 	INT   $0x03
 	INT   $0x03
 
-assert_check_36_ok_srcline_1166:
+assert_check_24_ok_srcline_1171:
 	MOVQ R9, R14
 	SUBQ R11, R14
 	CMPQ R13, R11
 	JG   copy_all_from_history
 	CMPQ R13, $0x03
-	JAE  assert_check_37_ok_srcline_1301
+	JAE  assert_check_25_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_37_ok_srcline_1301:
+assert_check_25_ok_srcline_1306:
 	MOVQ R13, R11
 	SUBQ $0x10, R11
 	JB   copy_4_small
@@ -1470,11 +1398,11 @@ copy_4_end:
 
 copy_all_from_history:
 	CMPQ R11, $0x01
-	JAE  assert_check_38_ok_srcline_1301
+	JAE  assert_check_26_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_38_ok_srcline_1301:
+assert_check_26_ok_srcline_1306:
 	MOVQ R11, R15
 	SUBQ $0x10, R15
 	JB   copy_5_small
@@ -1645,11 +1573,11 @@ main_loop:
 	TESTQ R11, R11
 	JZ    check_offset
 	CMPQ  R11, $0x01
-	JAE   assert_check_39_ok_srcline_1301
+	JAE   assert_check_27_ok_srcline_1306
 	INT   $0x03
 	INT   $0x03
 
-assert_check_39_ok_srcline_1301:
+assert_check_27_ok_srcline_1306:
 	MOVQ R11, R14
 	SUBQ $0x10, R14
 	JB   copy_1_small
@@ -1726,21 +1654,21 @@ check_offset:
 	SUBQ  DI, R11
 	JLS   copy_match
 	TESTQ R10, R10
-	JNZ   assert_check_40_ok_srcline_1166
+	JNZ   assert_check_28_ok_srcline_1171
 	INT   $0x03
 	INT   $0x03
 
-assert_check_40_ok_srcline_1166:
+assert_check_28_ok_srcline_1171:
 	MOVQ R9, R14
 	SUBQ R11, R14
 	CMPQ R13, R11
 	JG   copy_all_from_history
 	CMPQ R13, $0x03
-	JAE  assert_check_41_ok_srcline_1301
+	JAE  assert_check_29_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_41_ok_srcline_1301:
+assert_check_29_ok_srcline_1306:
 	MOVQ R13, R11
 	SUBQ $0x10, R11
 	JB   copy_4_small
@@ -1801,11 +1729,11 @@ copy_4_end:
 
 copy_all_from_history:
 	CMPQ R11, $0x01
-	JAE  assert_check_42_ok_srcline_1301
+	JAE  assert_check_30_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_42_ok_srcline_1301:
+assert_check_30_ok_srcline_1306:
 	MOVQ R11, R15
 	SUBQ $0x10, R15
 	JB   copy_5_small
@@ -1882,11 +1810,11 @@ copy_match:
 	// Copy non-overlapping match
 	ADDQ R13, DI
 	CMPQ R13, $0x01
-	JAE  assert_check_43_ok_srcline_1301
+	JAE  assert_check_31_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_43_ok_srcline_1301:
+assert_check_31_ok_srcline_1306:
 	MOVQ R13, R12
 	SUBQ $0x10, R12
 	JB   copy_2_small
@@ -2013,6 +1941,10 @@ TEXT ·sequenceDecs_decodeSync_amd64(SB), $64-32
 	MOVQ    72(AX), DI
 	MOVQ    80(AX), R8
 	MOVQ    88(AX), R9
+	XORQ    CX, CX
+	MOVQ    CX, 8(SP)
+	MOVQ    CX, 16(SP)
+	MOVQ    CX, 24(SP)
 	MOVQ    112(AX), R10
 	MOVQ    128(AX), CX
 	MOVQ    CX, 32(SP)
@@ -2073,20 +2005,8 @@ sequenceDecs_decodeSync_amd64_fill_end:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R14
-	CMPQ    AX, $0x10000000
-	JB      assert_check_44_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_44_ok_srcline_602:
-	CMPQ R14, $0x10000000
-	JB   assert_check_45_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_45_ok_srcline_607:
-	ADDQ R14, AX
-	MOVQ AX, 8(SP)
+	ADDQ    R14, AX
+	MOVQ    AX, 8(SP)
 
 	// Update match length
 	MOVQ    R8, AX
@@ -2100,20 +2020,8 @@ assert_check_45_ok_srcline_607:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R14
-	CMPQ    AX, $0x10000000
-	JB      assert_check_46_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_46_ok_srcline_602:
-	CMPQ R14, $0x10000000
-	JB   assert_check_47_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_47_ok_srcline_607:
-	ADDQ R14, AX
-	MOVQ AX, 16(SP)
+	ADDQ    R14, AX
+	MOVQ    AX, 16(SP)
 
 	// Fill bitreader to have enough for the remaining
 	CMPQ SI, $0x08
@@ -2152,20 +2060,8 @@ sequenceDecs_decodeSync_amd64_fill_2_end:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R14
-	CMPQ    AX, $0x10000000
-	JB      assert_check_48_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_48_ok_srcline_602:
-	CMPQ R14, $0x10000000
-	JB   assert_check_49_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_49_ok_srcline_607:
-	ADDQ R14, AX
-	MOVQ AX, 24(SP)
+	ADDQ    R14, AX
+	MOVQ    AX, 24(SP)
 
 	// Fill bitreader for state updates
 	MOVQ    R13, (SP)
@@ -2179,11 +2075,11 @@ assert_check_49_ok_srcline_607:
 	// Update Literal Length State
 	MOVBQZX DI, R13
 	CMPQ    R13, $0x09
-	JBE     assert_check_50_ok_srcline_621
+	JBE     assert_check_32_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_50_ok_srcline_621:
+assert_check_32_ok_srcline_616:
 	SHRQ    $0x10, DI
 	MOVWQZX DI, DI
 	LEAQ    (BX)(R13*1), CX
@@ -2196,32 +2092,32 @@ assert_check_50_ok_srcline_621:
 	DECL    R15
 	ANDQ    R15, R14
 	CMPQ    R14, $0x00000200
-	JB      assert_check_51_ok_srcline_640
+	JB      assert_check_33_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_51_ok_srcline_640:
+assert_check_33_ok_srcline_635:
 	ADDQ R14, DI
 
 	// Load ctx.llTable
 	MOVQ ctx+16(FP), CX
 	MOVQ (CX), CX
 	CMPQ DI, $0x00000200
-	JB   assert_check_52_ok_srcline_658
+	JB   assert_check_34_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_52_ok_srcline_658:
+assert_check_34_ok_srcline_653:
 	MOVQ (CX)(DI*8), DI
 
 	// Update Match Length State
 	MOVBQZX R8, R13
 	CMPQ    R13, $0x09
-	JBE     assert_check_53_ok_srcline_621
+	JBE     assert_check_35_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_53_ok_srcline_621:
+assert_check_35_ok_srcline_616:
 	SHRQ    $0x10, R8
 	MOVWQZX R8, R8
 	LEAQ    (BX)(R13*1), CX
@@ -2234,32 +2130,32 @@ assert_check_53_ok_srcline_621:
 	DECL    R15
 	ANDQ    R15, R14
 	CMPQ    R14, $0x00000200
-	JB      assert_check_54_ok_srcline_640
+	JB      assert_check_36_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_54_ok_srcline_640:
+assert_check_36_ok_srcline_635:
 	ADDQ R14, R8
 
 	// Load ctx.mlTable
 	MOVQ ctx+16(FP), CX
 	MOVQ 24(CX), CX
 	CMPQ R8, $0x00000200
-	JB   assert_check_55_ok_srcline_658
+	JB   assert_check_37_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_55_ok_srcline_658:
+assert_check_37_ok_srcline_653:
 	MOVQ (CX)(R8*8), R8
 
 	// Update Offset State
 	MOVBQZX R9, R13
 	CMPQ    R13, $0x09
-	JBE     assert_check_56_ok_srcline_621
+	JBE     assert_check_38_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_56_ok_srcline_621:
+assert_check_38_ok_srcline_616:
 	SHRQ    $0x10, R9
 	MOVWQZX R9, R9
 	LEAQ    (BX)(R13*1), CX
@@ -2272,22 +2168,22 @@ assert_check_56_ok_srcline_621:
 	DECL    R15
 	ANDQ    R15, R14
 	CMPQ    R14, $0x00000200
-	JB      assert_check_57_ok_srcline_640
+	JB      assert_check_39_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_57_ok_srcline_640:
+assert_check_39_ok_srcline_635:
 	ADDQ R14, R9
 
 	// Load ctx.ofTable
 	MOVQ ctx+16(FP), CX
 	MOVQ 48(CX), CX
 	CMPQ R9, $0x00000200
-	JB   assert_check_58_ok_srcline_658
+	JB   assert_check_40_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_58_ok_srcline_658:
+assert_check_40_ok_srcline_653:
 	MOVQ (CX)(R9*8), R9
 
 sequenceDecs_decodeSync_amd64_skip_update:
@@ -2314,6 +2210,24 @@ sequenceDecs_decodeSync_amd64_adjust_offset_maybezero:
 	JMP   sequenceDecs_decodeSync_amd64_after_adjust
 
 sequenceDecs_decodeSync_amd64_adjust_offset_nonzero:
+	CMPQ R13, $0x00000000
+	JAE  assert_check_41_ok_srcline_878
+	INT  $0x03
+	INT  $0x03
+
+assert_check_41_ok_srcline_878:
+	CMPQ R13, $0x00000000
+	JA   assert_check_42_ok_srcline_883
+	INT  $0x03
+	INT  $0x03
+
+assert_check_42_ok_srcline_883:
+	CMPQ R13, $0x00000003
+	JBE  assert_check_43_ok_srcline_888
+	INT  $0x03
+	INT  $0x03
+
+assert_check_43_ok_srcline_888:
 	MOVQ    R13, AX
 	XORQ    R14, R14
 	MOVQ    $-1, R15
@@ -2321,17 +2235,17 @@ sequenceDecs_decodeSync_amd64_adjust_offset_nonzero:
 	CMOVQEQ R14, AX
 	CMOVQEQ R15, R14
 	CMPQ    AX, $0x00000000
-	JAE     assert_check_59_ok_srcline_912
+	JAE     assert_check_44_ok_srcline_916
 	INT     $0x03
 	INT     $0x03
 
-assert_check_59_ok_srcline_912:
+assert_check_44_ok_srcline_916:
 	CMPQ AX, $0x00000003
-	JB   assert_check_60_ok_srcline_916
+	JB   assert_check_45_ok_srcline_920
 	INT  $0x03
 	INT  $0x03
 
-assert_check_60_ok_srcline_916:
+assert_check_45_ok_srcline_920:
 	ADDQ 144(CX)(AX*8), R14
 	JNZ  sequenceDecs_decodeSync_amd64_adjust_temp_valid
 	MOVQ $0x00000001, R14
@@ -2408,21 +2322,21 @@ check_offset:
 	JLS   copy_match
 	MOVQ  40(SP), R14
 	TESTQ R14, R14
-	JNZ   assert_check_61_ok_srcline_1166
+	JNZ   assert_check_46_ok_srcline_1171
 	INT   $0x03
 	INT   $0x03
 
-assert_check_61_ok_srcline_1166:
+assert_check_46_ok_srcline_1171:
 	MOVQ 48(SP), R14
 	SUBQ AX, R14
 	CMPQ R13, AX
 	JG   copy_all_from_history
 	CMPQ R13, $0x03
-	JAE  assert_check_62_ok_srcline_1301
+	JAE  assert_check_47_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_62_ok_srcline_1301:
+assert_check_47_ok_srcline_1306:
 	MOVQ R13, AX
 	SUBQ $0x10, AX
 	JB   copy_4_small
@@ -2480,11 +2394,11 @@ copy_4_end:
 
 copy_all_from_history:
 	CMPQ AX, $0x01
-	JAE  assert_check_63_ok_srcline_1301
+	JAE  assert_check_48_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_63_ok_srcline_1301:
+assert_check_48_ok_srcline_1306:
 	MOVQ AX, R15
 	SUBQ $0x10, R15
 	JB   copy_5_small
@@ -2664,6 +2578,10 @@ TEXT ·sequenceDecs_decodeSync_bmi2(SB), $64-32
 	MOVQ    72(CX), SI
 	MOVQ    80(CX), DI
 	MOVQ    88(CX), R8
+	XORQ    R9, R9
+	MOVQ    R9, 8(SP)
+	MOVQ    R9, 16(SP)
+	MOVQ    R9, 24(SP)
 	MOVQ    112(CX), R9
 	MOVQ    128(CX), R10
 	MOVQ    R10, 32(SP)
@@ -2803,11 +2721,11 @@ sequenceDecs_decodeSync_bmi2_fill_2_end:
 	MOVQ ctx+16(FP), CX
 	MOVQ 48(CX), CX
 	CMPQ R8, $0x00000200
-	JB   assert_check_64_ok_srcline_691
+	JB   assert_check_49_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_64_ok_srcline_691:
+assert_check_49_ok_srcline_686:
 	MOVQ (CX)(R8*8), R8
 
 	// Update Match Length State
@@ -2821,11 +2739,11 @@ assert_check_64_ok_srcline_691:
 	MOVQ ctx+16(FP), CX
 	MOVQ 24(CX), CX
 	CMPQ DI, $0x00000200
-	JB   assert_check_65_ok_srcline_691
+	JB   assert_check_50_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_65_ok_srcline_691:
+assert_check_50_ok_srcline_686:
 	MOVQ (CX)(DI*8), DI
 
 	// Update Literal Length State
@@ -2838,11 +2756,11 @@ assert_check_65_ok_srcline_691:
 	MOVQ ctx+16(FP), CX
 	MOVQ (CX), CX
 	CMPQ SI, $0x00000200
-	JB   assert_check_66_ok_srcline_691
+	JB   assert_check_51_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_66_ok_srcline_691:
+assert_check_51_ok_srcline_686:
 	MOVQ (CX)(SI*8), SI
 
 sequenceDecs_decodeSync_bmi2_skip_update:
@@ -2869,6 +2787,24 @@ sequenceDecs_decodeSync_bmi2_adjust_offset_maybezero:
 	JMP   sequenceDecs_decodeSync_bmi2_after_adjust
 
 sequenceDecs_decodeSync_bmi2_adjust_offset_nonzero:
+	CMPQ R13, $0x00000000
+	JAE  assert_check_52_ok_srcline_878
+	INT  $0x03
+	INT  $0x03
+
+assert_check_52_ok_srcline_878:
+	CMPQ R13, $0x00000000
+	JA   assert_check_53_ok_srcline_883
+	INT  $0x03
+	INT  $0x03
+
+assert_check_53_ok_srcline_883:
+	CMPQ R13, $0x00000003
+	JBE  assert_check_54_ok_srcline_888
+	INT  $0x03
+	INT  $0x03
+
+assert_check_54_ok_srcline_888:
 	MOVQ    R13, R12
 	XORQ    R14, R14
 	MOVQ    $-1, R15
@@ -2876,17 +2812,17 @@ sequenceDecs_decodeSync_bmi2_adjust_offset_nonzero:
 	CMOVQEQ R14, R12
 	CMOVQEQ R15, R14
 	CMPQ    R12, $0x00000000
-	JAE     assert_check_67_ok_srcline_912
+	JAE     assert_check_55_ok_srcline_916
 	INT     $0x03
 	INT     $0x03
 
-assert_check_67_ok_srcline_912:
+assert_check_55_ok_srcline_916:
 	CMPQ R12, $0x00000003
-	JB   assert_check_68_ok_srcline_916
+	JB   assert_check_56_ok_srcline_920
 	INT  $0x03
 	INT  $0x03
 
-assert_check_68_ok_srcline_916:
+assert_check_56_ok_srcline_920:
 	ADDQ 144(CX)(R12*8), R14
 	JNZ  sequenceDecs_decodeSync_bmi2_adjust_temp_valid
 	MOVQ $0x00000001, R14
@@ -2963,21 +2899,21 @@ check_offset:
 	JLS   copy_match
 	MOVQ  40(SP), R14
 	TESTQ R14, R14
-	JNZ   assert_check_69_ok_srcline_1166
+	JNZ   assert_check_57_ok_srcline_1171
 	INT   $0x03
 	INT   $0x03
 
-assert_check_69_ok_srcline_1166:
+assert_check_57_ok_srcline_1171:
 	MOVQ 48(SP), R14
 	SUBQ CX, R14
 	CMPQ R13, CX
 	JG   copy_all_from_history
 	CMPQ R13, $0x03
-	JAE  assert_check_70_ok_srcline_1301
+	JAE  assert_check_58_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_70_ok_srcline_1301:
+assert_check_58_ok_srcline_1306:
 	MOVQ R13, CX
 	SUBQ $0x10, CX
 	JB   copy_4_small
@@ -3035,11 +2971,11 @@ copy_4_end:
 
 copy_all_from_history:
 	CMPQ CX, $0x01
-	JAE  assert_check_71_ok_srcline_1301
+	JAE  assert_check_59_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_71_ok_srcline_1301:
+assert_check_59_ok_srcline_1306:
 	MOVQ CX, R15
 	SUBQ $0x10, R15
 	JB   copy_5_small
@@ -3219,6 +3155,10 @@ TEXT ·sequenceDecs_decodeSync_safe_amd64(SB), $64-32
 	MOVQ    72(AX), DI
 	MOVQ    80(AX), R8
 	MOVQ    88(AX), R9
+	XORQ    CX, CX
+	MOVQ    CX, 8(SP)
+	MOVQ    CX, 16(SP)
+	MOVQ    CX, 24(SP)
 	MOVQ    112(AX), R10
 	MOVQ    128(AX), CX
 	MOVQ    CX, 32(SP)
@@ -3279,20 +3219,8 @@ sequenceDecs_decodeSync_safe_amd64_fill_end:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R14
-	CMPQ    AX, $0x10000000
-	JB      assert_check_72_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_72_ok_srcline_602:
-	CMPQ R14, $0x10000000
-	JB   assert_check_73_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_73_ok_srcline_607:
-	ADDQ R14, AX
-	MOVQ AX, 8(SP)
+	ADDQ    R14, AX
+	MOVQ    AX, 8(SP)
 
 	// Update match length
 	MOVQ    R8, AX
@@ -3306,20 +3234,8 @@ assert_check_73_ok_srcline_607:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R14
-	CMPQ    AX, $0x10000000
-	JB      assert_check_74_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_74_ok_srcline_602:
-	CMPQ R14, $0x10000000
-	JB   assert_check_75_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_75_ok_srcline_607:
-	ADDQ R14, AX
-	MOVQ AX, 16(SP)
+	ADDQ    R14, AX
+	MOVQ    AX, 16(SP)
 
 	// Fill bitreader to have enough for the remaining
 	CMPQ SI, $0x08
@@ -3358,20 +3274,8 @@ sequenceDecs_decodeSync_safe_amd64_fill_2_end:
 	SHRQ    $0x20, AX
 	TESTQ   CX, CX
 	CMOVQEQ CX, R14
-	CMPQ    AX, $0x10000000
-	JB      assert_check_76_ok_srcline_602
-	INT     $0x03
-	INT     $0x03
-
-assert_check_76_ok_srcline_602:
-	CMPQ R14, $0x10000000
-	JB   assert_check_77_ok_srcline_607
-	INT  $0x03
-	INT  $0x03
-
-assert_check_77_ok_srcline_607:
-	ADDQ R14, AX
-	MOVQ AX, 24(SP)
+	ADDQ    R14, AX
+	MOVQ    AX, 24(SP)
 
 	// Fill bitreader for state updates
 	MOVQ    R13, (SP)
@@ -3385,11 +3289,11 @@ assert_check_77_ok_srcline_607:
 	// Update Literal Length State
 	MOVBQZX DI, R13
 	CMPQ    R13, $0x09
-	JBE     assert_check_78_ok_srcline_621
+	JBE     assert_check_60_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_78_ok_srcline_621:
+assert_check_60_ok_srcline_616:
 	SHRQ    $0x10, DI
 	MOVWQZX DI, DI
 	LEAQ    (BX)(R13*1), CX
@@ -3402,32 +3306,32 @@ assert_check_78_ok_srcline_621:
 	DECL    R15
 	ANDQ    R15, R14
 	CMPQ    R14, $0x00000200
-	JB      assert_check_79_ok_srcline_640
+	JB      assert_check_61_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_79_ok_srcline_640:
+assert_check_61_ok_srcline_635:
 	ADDQ R14, DI
 
 	// Load ctx.llTable
 	MOVQ ctx+16(FP), CX
 	MOVQ (CX), CX
 	CMPQ DI, $0x00000200
-	JB   assert_check_80_ok_srcline_658
+	JB   assert_check_62_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_80_ok_srcline_658:
+assert_check_62_ok_srcline_653:
 	MOVQ (CX)(DI*8), DI
 
 	// Update Match Length State
 	MOVBQZX R8, R13
 	CMPQ    R13, $0x09
-	JBE     assert_check_81_ok_srcline_621
+	JBE     assert_check_63_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_81_ok_srcline_621:
+assert_check_63_ok_srcline_616:
 	SHRQ    $0x10, R8
 	MOVWQZX R8, R8
 	LEAQ    (BX)(R13*1), CX
@@ -3440,32 +3344,32 @@ assert_check_81_ok_srcline_621:
 	DECL    R15
 	ANDQ    R15, R14
 	CMPQ    R14, $0x00000200
-	JB      assert_check_82_ok_srcline_640
+	JB      assert_check_64_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_82_ok_srcline_640:
+assert_check_64_ok_srcline_635:
 	ADDQ R14, R8
 
 	// Load ctx.mlTable
 	MOVQ ctx+16(FP), CX
 	MOVQ 24(CX), CX
 	CMPQ R8, $0x00000200
-	JB   assert_check_83_ok_srcline_658
+	JB   assert_check_65_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_83_ok_srcline_658:
+assert_check_65_ok_srcline_653:
 	MOVQ (CX)(R8*8), R8
 
 	// Update Offset State
 	MOVBQZX R9, R13
 	CMPQ    R13, $0x09
-	JBE     assert_check_84_ok_srcline_621
+	JBE     assert_check_66_ok_srcline_616
 	INT     $0x03
 	INT     $0x03
 
-assert_check_84_ok_srcline_621:
+assert_check_66_ok_srcline_616:
 	SHRQ    $0x10, R9
 	MOVWQZX R9, R9
 	LEAQ    (BX)(R13*1), CX
@@ -3478,22 +3382,22 @@ assert_check_84_ok_srcline_621:
 	DECL    R15
 	ANDQ    R15, R14
 	CMPQ    R14, $0x00000200
-	JB      assert_check_85_ok_srcline_640
+	JB      assert_check_67_ok_srcline_635
 	INT     $0x03
 	INT     $0x03
 
-assert_check_85_ok_srcline_640:
+assert_check_67_ok_srcline_635:
 	ADDQ R14, R9
 
 	// Load ctx.ofTable
 	MOVQ ctx+16(FP), CX
 	MOVQ 48(CX), CX
 	CMPQ R9, $0x00000200
-	JB   assert_check_86_ok_srcline_658
+	JB   assert_check_68_ok_srcline_653
 	INT  $0x03
 	INT  $0x03
 
-assert_check_86_ok_srcline_658:
+assert_check_68_ok_srcline_653:
 	MOVQ (CX)(R9*8), R9
 
 sequenceDecs_decodeSync_safe_amd64_skip_update:
@@ -3520,6 +3424,24 @@ sequenceDecs_decodeSync_safe_amd64_adjust_offset_maybezero:
 	JMP   sequenceDecs_decodeSync_safe_amd64_after_adjust
 
 sequenceDecs_decodeSync_safe_amd64_adjust_offset_nonzero:
+	CMPQ R13, $0x00000000
+	JAE  assert_check_69_ok_srcline_878
+	INT  $0x03
+	INT  $0x03
+
+assert_check_69_ok_srcline_878:
+	CMPQ R13, $0x00000000
+	JA   assert_check_70_ok_srcline_883
+	INT  $0x03
+	INT  $0x03
+
+assert_check_70_ok_srcline_883:
+	CMPQ R13, $0x00000003
+	JBE  assert_check_71_ok_srcline_888
+	INT  $0x03
+	INT  $0x03
+
+assert_check_71_ok_srcline_888:
 	MOVQ    R13, AX
 	XORQ    R14, R14
 	MOVQ    $-1, R15
@@ -3527,17 +3449,17 @@ sequenceDecs_decodeSync_safe_amd64_adjust_offset_nonzero:
 	CMOVQEQ R14, AX
 	CMOVQEQ R15, R14
 	CMPQ    AX, $0x00000000
-	JAE     assert_check_87_ok_srcline_912
+	JAE     assert_check_72_ok_srcline_916
 	INT     $0x03
 	INT     $0x03
 
-assert_check_87_ok_srcline_912:
+assert_check_72_ok_srcline_916:
 	CMPQ AX, $0x00000003
-	JB   assert_check_88_ok_srcline_916
+	JB   assert_check_73_ok_srcline_920
 	INT  $0x03
 	INT  $0x03
 
-assert_check_88_ok_srcline_916:
+assert_check_73_ok_srcline_920:
 	ADDQ 144(CX)(AX*8), R14
 	JNZ  sequenceDecs_decodeSync_safe_amd64_adjust_temp_valid
 	MOVQ $0x00000001, R14
@@ -3588,11 +3510,11 @@ sequenceDecs_decodeSync_safe_amd64_match_len_ofs_ok:
 	TESTQ AX, AX
 	JZ    check_offset
 	CMPQ  AX, $0x01
-	JAE   assert_check_89_ok_srcline_1301
+	JAE   assert_check_74_ok_srcline_1306
 	INT   $0x03
 	INT   $0x03
 
-assert_check_89_ok_srcline_1301:
+assert_check_74_ok_srcline_1306:
 	MOVQ AX, R14
 	SUBQ $0x10, R14
 	JB   copy_1_small
@@ -3671,21 +3593,21 @@ check_offset:
 	JLS   copy_match
 	MOVQ  40(SP), R14
 	TESTQ R14, R14
-	JNZ   assert_check_90_ok_srcline_1166
+	JNZ   assert_check_75_ok_srcline_1171
 	INT   $0x03
 	INT   $0x03
 
-assert_check_90_ok_srcline_1166:
+assert_check_75_ok_srcline_1171:
 	MOVQ 48(SP), R14
 	SUBQ AX, R14
 	CMPQ R13, AX
 	JG   copy_all_from_history
 	CMPQ R13, $0x03
-	JAE  assert_check_91_ok_srcline_1301
+	JAE  assert_check_76_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_91_ok_srcline_1301:
+assert_check_76_ok_srcline_1306:
 	MOVQ R13, AX
 	SUBQ $0x10, AX
 	JB   copy_4_small
@@ -3743,11 +3665,11 @@ copy_4_end:
 
 copy_all_from_history:
 	CMPQ AX, $0x01
-	JAE  assert_check_92_ok_srcline_1301
+	JAE  assert_check_77_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_92_ok_srcline_1301:
+assert_check_77_ok_srcline_1306:
 	MOVQ AX, R15
 	SUBQ $0x10, R15
 	JB   copy_5_small
@@ -3824,11 +3746,11 @@ copy_match:
 	// Copy non-overlapping match
 	ADDQ R13, R12
 	CMPQ R13, $0x01
-	JAE  assert_check_93_ok_srcline_1301
+	JAE  assert_check_78_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_93_ok_srcline_1301:
+assert_check_78_ok_srcline_1306:
 	MOVQ R13, CX
 	SUBQ $0x10, CX
 	JB   copy_2_small
@@ -3984,6 +3906,10 @@ TEXT ·sequenceDecs_decodeSync_safe_bmi2(SB), $64-32
 	MOVQ    72(CX), SI
 	MOVQ    80(CX), DI
 	MOVQ    88(CX), R8
+	XORQ    R9, R9
+	MOVQ    R9, 8(SP)
+	MOVQ    R9, 16(SP)
+	MOVQ    R9, 24(SP)
 	MOVQ    112(CX), R9
 	MOVQ    128(CX), R10
 	MOVQ    R10, 32(SP)
@@ -4123,11 +4049,11 @@ sequenceDecs_decodeSync_safe_bmi2_fill_2_end:
 	MOVQ ctx+16(FP), CX
 	MOVQ 48(CX), CX
 	CMPQ R8, $0x00000200
-	JB   assert_check_94_ok_srcline_691
+	JB   assert_check_79_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_94_ok_srcline_691:
+assert_check_79_ok_srcline_686:
 	MOVQ (CX)(R8*8), R8
 
 	// Update Match Length State
@@ -4141,11 +4067,11 @@ assert_check_94_ok_srcline_691:
 	MOVQ ctx+16(FP), CX
 	MOVQ 24(CX), CX
 	CMPQ DI, $0x00000200
-	JB   assert_check_95_ok_srcline_691
+	JB   assert_check_80_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_95_ok_srcline_691:
+assert_check_80_ok_srcline_686:
 	MOVQ (CX)(DI*8), DI
 
 	// Update Literal Length State
@@ -4158,11 +4084,11 @@ assert_check_95_ok_srcline_691:
 	MOVQ ctx+16(FP), CX
 	MOVQ (CX), CX
 	CMPQ SI, $0x00000200
-	JB   assert_check_96_ok_srcline_691
+	JB   assert_check_81_ok_srcline_686
 	INT  $0x03
 	INT  $0x03
 
-assert_check_96_ok_srcline_691:
+assert_check_81_ok_srcline_686:
 	MOVQ (CX)(SI*8), SI
 
 sequenceDecs_decodeSync_safe_bmi2_skip_update:
@@ -4189,6 +4115,24 @@ sequenceDecs_decodeSync_safe_bmi2_adjust_offset_maybezero:
 	JMP   sequenceDecs_decodeSync_safe_bmi2_after_adjust
 
 sequenceDecs_decodeSync_safe_bmi2_adjust_offset_nonzero:
+	CMPQ R13, $0x00000000
+	JAE  assert_check_82_ok_srcline_878
+	INT  $0x03
+	INT  $0x03
+
+assert_check_82_ok_srcline_878:
+	CMPQ R13, $0x00000000
+	JA   assert_check_83_ok_srcline_883
+	INT  $0x03
+	INT  $0x03
+
+assert_check_83_ok_srcline_883:
+	CMPQ R13, $0x00000003
+	JBE  assert_check_84_ok_srcline_888
+	INT  $0x03
+	INT  $0x03
+
+assert_check_84_ok_srcline_888:
 	MOVQ    R13, R12
 	XORQ    R14, R14
 	MOVQ    $-1, R15
@@ -4196,17 +4140,17 @@ sequenceDecs_decodeSync_safe_bmi2_adjust_offset_nonzero:
 	CMOVQEQ R14, R12
 	CMOVQEQ R15, R14
 	CMPQ    R12, $0x00000000
-	JAE     assert_check_97_ok_srcline_912
+	JAE     assert_check_85_ok_srcline_916
 	INT     $0x03
 	INT     $0x03
 
-assert_check_97_ok_srcline_912:
+assert_check_85_ok_srcline_916:
 	CMPQ R12, $0x00000003
-	JB   assert_check_98_ok_srcline_916
+	JB   assert_check_86_ok_srcline_920
 	INT  $0x03
 	INT  $0x03
 
-assert_check_98_ok_srcline_916:
+assert_check_86_ok_srcline_920:
 	ADDQ 144(CX)(R12*8), R14
 	JNZ  sequenceDecs_decodeSync_safe_bmi2_adjust_temp_valid
 	MOVQ $0x00000001, R14
@@ -4257,11 +4201,11 @@ sequenceDecs_decodeSync_safe_bmi2_match_len_ofs_ok:
 	TESTQ CX, CX
 	JZ    check_offset
 	CMPQ  CX, $0x01
-	JAE   assert_check_99_ok_srcline_1301
+	JAE   assert_check_87_ok_srcline_1306
 	INT   $0x03
 	INT   $0x03
 
-assert_check_99_ok_srcline_1301:
+assert_check_87_ok_srcline_1306:
 	MOVQ CX, R14
 	SUBQ $0x10, R14
 	JB   copy_1_small
@@ -4340,21 +4284,21 @@ check_offset:
 	JLS   copy_match
 	MOVQ  40(SP), R14
 	TESTQ R14, R14
-	JNZ   assert_check_100_ok_srcline_1166
+	JNZ   assert_check_88_ok_srcline_1171
 	INT   $0x03
 	INT   $0x03
 
-assert_check_100_ok_srcline_1166:
+assert_check_88_ok_srcline_1171:
 	MOVQ 48(SP), R14
 	SUBQ CX, R14
 	CMPQ R13, CX
 	JG   copy_all_from_history
 	CMPQ R13, $0x03
-	JAE  assert_check_101_ok_srcline_1301
+	JAE  assert_check_89_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_101_ok_srcline_1301:
+assert_check_89_ok_srcline_1306:
 	MOVQ R13, CX
 	SUBQ $0x10, CX
 	JB   copy_4_small
@@ -4412,11 +4356,11 @@ copy_4_end:
 
 copy_all_from_history:
 	CMPQ CX, $0x01
-	JAE  assert_check_102_ok_srcline_1301
+	JAE  assert_check_90_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_102_ok_srcline_1301:
+assert_check_90_ok_srcline_1306:
 	MOVQ CX, R15
 	SUBQ $0x10, R15
 	JB   copy_5_small
@@ -4493,11 +4437,11 @@ copy_match:
 	// Copy non-overlapping match
 	ADDQ R13, R11
 	CMPQ R13, $0x01
-	JAE  assert_check_103_ok_srcline_1301
+	JAE  assert_check_91_ok_srcline_1306
 	INT  $0x03
 	INT  $0x03
 
-assert_check_103_ok_srcline_1301:
+assert_check_91_ok_srcline_1306:
 	MOVQ R13, R12
 	SUBQ $0x10, R12
 	JB   copy_2_small