{"payload":{"header_redesign_enabled":false,"results":[{"id":"325652115","archived":false,"color":"#DAE1C2","followers":1,"has_funding_file":false,"hl_name":"jmerdich/mr-soc","hl_trunc_description":"Mr. SOC - Merdich RISC-V SOC","language":"SystemVerilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":325652115,"name":"mr-soc","owner_id":6345033,"owner_login":"jmerdich","updated_at":"2022-10-11T00:31:36.684Z","has_issues":true}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":51,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Ajmerdich%252Fmr-soc%2B%2Blanguage%253ASystemVerilog","metadata":null,"csrf_tokens":{"/jmerdich/mr-soc/star":{"post":"HNRt4iuKbX23ZW2NSA9-N3Qz1zF8x8ccejBMfh4rhWaHmLF0p2brwJUxiOK0Vp1QfhBNRLASgcQ9rofQet6hOw"},"/jmerdich/mr-soc/unstar":{"post":"nkaaKV04NafbcxbwYvpdgEroDwYMBMN3QfI4ebL6ewvEcNiulUxE6QGK_v43kpIFsIs98JNOeKThpGHzQyqsfQ"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"QOwsNqlJnplfuBFE1qxYddk8odUdzHxjvaRHZoXmbohBqirMuMFMynDvwhB9dYtceBLnH3sE0bIyTtMkboxpPA"}}},"title":"Repository search results"}