forked from bytecodealliance/wasmtime
/
emit_tests.rs
4884 lines (4702 loc) · 132 KB
/
emit_tests.rs
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//! Tests for the emitter
//!
//! See comments at the top of `fn x64_emit` for advice on how to create reliable test cases.
//!
//! to see stdout: cargo test -- --nocapture
//!
//! for this specific case, as of 24 Aug 2020:
//!
//! cd to the top of your wasmtime tree, then:
//!
//! RUST_BACKTRACE=1 cargo test --features test-programs/test_programs \
//! --features experimental_x64 --all --exclude wasmtime-wasi-nn \
//! -- isa::x64::inst::emit_tests::test_x64_emit
use super::*;
use crate::isa::x64;
use alloc::boxed::Box;
use alloc::vec::Vec;
impl Inst {
fn neg(size: OperandSize, src: Writable<Reg>) -> Inst {
debug_assert_eq!(src.to_reg().class(), RegClass::Int);
Inst::Neg {
size,
src: Gpr::new(src.to_reg()).unwrap(),
dst: WritableGpr::from_writable_reg(src).unwrap(),
}
}
}
#[test]
fn test_x64_emit() {
let rax = regs::rax();
let rbx = regs::rbx();
let rcx = regs::rcx();
let rdx = regs::rdx();
let rsi = regs::rsi();
let rdi = regs::rdi();
let rsp = regs::rsp();
let rbp = regs::rbp();
let r8 = regs::r8();
let r9 = regs::r9();
let r10 = regs::r10();
let r11 = regs::r11();
let r12 = regs::r12();
let r13 = regs::r13();
let r14 = regs::r14();
let r15 = regs::r15();
let xmm0 = regs::xmm0();
let xmm1 = regs::xmm1();
let xmm2 = regs::xmm2();
let xmm3 = regs::xmm3();
let xmm4 = regs::xmm4();
let xmm5 = regs::xmm5();
let xmm6 = regs::xmm6();
let xmm7 = regs::xmm7();
let xmm8 = regs::xmm8();
let xmm9 = regs::xmm9();
let xmm10 = regs::xmm10();
let xmm11 = regs::xmm11();
let xmm12 = regs::xmm12();
let xmm13 = regs::xmm13();
let xmm14 = regs::xmm14();
let xmm15 = regs::xmm15();
// And Writable<> versions of the same:
let w_rax = Writable::<Reg>::from_reg(rax);
let w_rbx = Writable::<Reg>::from_reg(rbx);
let w_rcx = Writable::<Reg>::from_reg(rcx);
let w_rdx = Writable::<Reg>::from_reg(rdx);
let w_rsi = Writable::<Reg>::from_reg(rsi);
let w_rdi = Writable::<Reg>::from_reg(rdi);
let _w_rsp = Writable::<Reg>::from_reg(rsp);
let _w_rbp = Writable::<Reg>::from_reg(rbp);
let w_r8 = Writable::<Reg>::from_reg(r8);
let w_r9 = Writable::<Reg>::from_reg(r9);
let _w_r10 = Writable::<Reg>::from_reg(r10);
let w_r11 = Writable::<Reg>::from_reg(r11);
let w_r12 = Writable::<Reg>::from_reg(r12);
let w_r13 = Writable::<Reg>::from_reg(r13);
let w_r14 = Writable::<Reg>::from_reg(r14);
let w_r15 = Writable::<Reg>::from_reg(r15);
let w_xmm0 = Writable::<Reg>::from_reg(xmm0);
let w_xmm1 = Writable::<Reg>::from_reg(xmm1);
let w_xmm2 = Writable::<Reg>::from_reg(xmm2);
let w_xmm3 = Writable::<Reg>::from_reg(xmm3);
let w_xmm4 = Writable::<Reg>::from_reg(xmm4);
let w_xmm5 = Writable::<Reg>::from_reg(xmm5);
let w_xmm6 = Writable::<Reg>::from_reg(xmm6);
let w_xmm7 = Writable::<Reg>::from_reg(xmm7);
let w_xmm8 = Writable::<Reg>::from_reg(xmm8);
let w_xmm9 = Writable::<Reg>::from_reg(xmm9);
let w_xmm10 = Writable::<Reg>::from_reg(xmm10);
let w_xmm11 = Writable::<Reg>::from_reg(xmm11);
let w_xmm12 = Writable::<Reg>::from_reg(xmm12);
let w_xmm13 = Writable::<Reg>::from_reg(xmm13);
let w_xmm14 = Writable::<Reg>::from_reg(xmm14);
let w_xmm15 = Writable::<Reg>::from_reg(xmm15);
let mut insns = Vec::<(Inst, &str, &str)>::new();
// ========================================================
// Cases aimed at checking Addr-esses: IR (Imm + Reg)
//
// These are just a bunch of loads with all supported (by the emitter)
// permutations of address formats.
//
// Addr_IR, offset zero
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, rax), w_rdi),
"488B38",
"movq 0(%rax), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, rbx), w_rdi),
"488B3B",
"movq 0(%rbx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, rcx), w_rdi),
"488B39",
"movq 0(%rcx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, rdx), w_rdi),
"488B3A",
"movq 0(%rdx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, rbp), w_rdi),
"488B7D00",
"movq 0(%rbp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, rsp), w_rdi),
"488B3C24",
"movq 0(%rsp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, rsi), w_rdi),
"488B3E",
"movq 0(%rsi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, rdi), w_rdi),
"488B3F",
"movq 0(%rdi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, r8), w_rdi),
"498B38",
"movq 0(%r8), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, r9), w_rdi),
"498B39",
"movq 0(%r9), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, r10), w_rdi),
"498B3A",
"movq 0(%r10), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, r11), w_rdi),
"498B3B",
"movq 0(%r11), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, r12), w_rdi),
"498B3C24",
"movq 0(%r12), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, r13), w_rdi),
"498B7D00",
"movq 0(%r13), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, r14), w_rdi),
"498B3E",
"movq 0(%r14), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0, r15), w_rdi),
"498B3F",
"movq 0(%r15), %rdi",
));
// ========================================================
// Addr_IR, offset max simm8
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, rax), w_rdi),
"488B787F",
"movq 127(%rax), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, rbx), w_rdi),
"488B7B7F",
"movq 127(%rbx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, rcx), w_rdi),
"488B797F",
"movq 127(%rcx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, rdx), w_rdi),
"488B7A7F",
"movq 127(%rdx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, rbp), w_rdi),
"488B7D7F",
"movq 127(%rbp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, rsp), w_rdi),
"488B7C247F",
"movq 127(%rsp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, rsi), w_rdi),
"488B7E7F",
"movq 127(%rsi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, rdi), w_rdi),
"488B7F7F",
"movq 127(%rdi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, r8), w_rdi),
"498B787F",
"movq 127(%r8), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, r9), w_rdi),
"498B797F",
"movq 127(%r9), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, r10), w_rdi),
"498B7A7F",
"movq 127(%r10), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, r11), w_rdi),
"498B7B7F",
"movq 127(%r11), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, r12), w_rdi),
"498B7C247F",
"movq 127(%r12), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, r13), w_rdi),
"498B7D7F",
"movq 127(%r13), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, r14), w_rdi),
"498B7E7F",
"movq 127(%r14), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(127, r15), w_rdi),
"498B7F7F",
"movq 127(%r15), %rdi",
));
// ========================================================
// Addr_IR, offset min simm8
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, rax), w_rdi),
"488B7880",
"movq -128(%rax), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, rbx), w_rdi),
"488B7B80",
"movq -128(%rbx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, rcx), w_rdi),
"488B7980",
"movq -128(%rcx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, rdx), w_rdi),
"488B7A80",
"movq -128(%rdx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, rbp), w_rdi),
"488B7D80",
"movq -128(%rbp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, rsp), w_rdi),
"488B7C2480",
"movq -128(%rsp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, rsi), w_rdi),
"488B7E80",
"movq -128(%rsi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, rdi), w_rdi),
"488B7F80",
"movq -128(%rdi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, r8), w_rdi),
"498B7880",
"movq -128(%r8), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, r9), w_rdi),
"498B7980",
"movq -128(%r9), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, r10), w_rdi),
"498B7A80",
"movq -128(%r10), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, r11), w_rdi),
"498B7B80",
"movq -128(%r11), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, r12), w_rdi),
"498B7C2480",
"movq -128(%r12), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, r13), w_rdi),
"498B7D80",
"movq -128(%r13), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, r14), w_rdi),
"498B7E80",
"movq -128(%r14), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-128i32 as u32, r15), w_rdi),
"498B7F80",
"movq -128(%r15), %rdi",
));
// ========================================================
// Addr_IR, offset smallest positive simm32
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, rax), w_rdi),
"488BB880000000",
"movq 128(%rax), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, rbx), w_rdi),
"488BBB80000000",
"movq 128(%rbx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, rcx), w_rdi),
"488BB980000000",
"movq 128(%rcx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, rdx), w_rdi),
"488BBA80000000",
"movq 128(%rdx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, rbp), w_rdi),
"488BBD80000000",
"movq 128(%rbp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, rsp), w_rdi),
"488BBC2480000000",
"movq 128(%rsp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, rsi), w_rdi),
"488BBE80000000",
"movq 128(%rsi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, rdi), w_rdi),
"488BBF80000000",
"movq 128(%rdi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, r8), w_rdi),
"498BB880000000",
"movq 128(%r8), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, r9), w_rdi),
"498BB980000000",
"movq 128(%r9), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, r10), w_rdi),
"498BBA80000000",
"movq 128(%r10), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, r11), w_rdi),
"498BBB80000000",
"movq 128(%r11), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, r12), w_rdi),
"498BBC2480000000",
"movq 128(%r12), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, r13), w_rdi),
"498BBD80000000",
"movq 128(%r13), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, r14), w_rdi),
"498BBE80000000",
"movq 128(%r14), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(128, r15), w_rdi),
"498BBF80000000",
"movq 128(%r15), %rdi",
));
// ========================================================
// Addr_IR, offset smallest negative simm32
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, rax), w_rdi),
"488BB87FFFFFFF",
"movq -129(%rax), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, rbx), w_rdi),
"488BBB7FFFFFFF",
"movq -129(%rbx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, rcx), w_rdi),
"488BB97FFFFFFF",
"movq -129(%rcx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, rdx), w_rdi),
"488BBA7FFFFFFF",
"movq -129(%rdx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, rbp), w_rdi),
"488BBD7FFFFFFF",
"movq -129(%rbp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, rsp), w_rdi),
"488BBC247FFFFFFF",
"movq -129(%rsp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, rsi), w_rdi),
"488BBE7FFFFFFF",
"movq -129(%rsi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, rdi), w_rdi),
"488BBF7FFFFFFF",
"movq -129(%rdi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, r8), w_rdi),
"498BB87FFFFFFF",
"movq -129(%r8), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, r9), w_rdi),
"498BB97FFFFFFF",
"movq -129(%r9), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, r10), w_rdi),
"498BBA7FFFFFFF",
"movq -129(%r10), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, r11), w_rdi),
"498BBB7FFFFFFF",
"movq -129(%r11), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, r12), w_rdi),
"498BBC247FFFFFFF",
"movq -129(%r12), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, r13), w_rdi),
"498BBD7FFFFFFF",
"movq -129(%r13), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, r14), w_rdi),
"498BBE7FFFFFFF",
"movq -129(%r14), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-129i32 as u32, r15), w_rdi),
"498BBF7FFFFFFF",
"movq -129(%r15), %rdi",
));
// ========================================================
// Addr_IR, offset large positive simm32
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, rax), w_rdi),
"488BB877207317",
"movq 393420919(%rax), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, rbx), w_rdi),
"488BBB77207317",
"movq 393420919(%rbx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, rcx), w_rdi),
"488BB977207317",
"movq 393420919(%rcx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, rdx), w_rdi),
"488BBA77207317",
"movq 393420919(%rdx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, rbp), w_rdi),
"488BBD77207317",
"movq 393420919(%rbp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, rsp), w_rdi),
"488BBC2477207317",
"movq 393420919(%rsp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, rsi), w_rdi),
"488BBE77207317",
"movq 393420919(%rsi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, rdi), w_rdi),
"488BBF77207317",
"movq 393420919(%rdi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, r8), w_rdi),
"498BB877207317",
"movq 393420919(%r8), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, r9), w_rdi),
"498BB977207317",
"movq 393420919(%r9), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, r10), w_rdi),
"498BBA77207317",
"movq 393420919(%r10), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, r11), w_rdi),
"498BBB77207317",
"movq 393420919(%r11), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, r12), w_rdi),
"498BBC2477207317",
"movq 393420919(%r12), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, r13), w_rdi),
"498BBD77207317",
"movq 393420919(%r13), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, r14), w_rdi),
"498BBE77207317",
"movq 393420919(%r14), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(0x17732077, r15), w_rdi),
"498BBF77207317",
"movq 393420919(%r15), %rdi",
));
// ========================================================
// Addr_IR, offset large negative simm32
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, rax), w_rdi),
"488BB8D9A6BECE",
"movq -826366247(%rax), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, rbx), w_rdi),
"488BBBD9A6BECE",
"movq -826366247(%rbx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, rcx), w_rdi),
"488BB9D9A6BECE",
"movq -826366247(%rcx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, rdx), w_rdi),
"488BBAD9A6BECE",
"movq -826366247(%rdx), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, rbp), w_rdi),
"488BBDD9A6BECE",
"movq -826366247(%rbp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, rsp), w_rdi),
"488BBC24D9A6BECE",
"movq -826366247(%rsp), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, rsi), w_rdi),
"488BBED9A6BECE",
"movq -826366247(%rsi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, rdi), w_rdi),
"488BBFD9A6BECE",
"movq -826366247(%rdi), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, r8), w_rdi),
"498BB8D9A6BECE",
"movq -826366247(%r8), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, r9), w_rdi),
"498BB9D9A6BECE",
"movq -826366247(%r9), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, r10), w_rdi),
"498BBAD9A6BECE",
"movq -826366247(%r10), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, r11), w_rdi),
"498BBBD9A6BECE",
"movq -826366247(%r11), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, r12), w_rdi),
"498BBC24D9A6BECE",
"movq -826366247(%r12), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, r13), w_rdi),
"498BBDD9A6BECE",
"movq -826366247(%r13), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, r14), w_rdi),
"498BBED9A6BECE",
"movq -826366247(%r14), %rdi",
));
insns.push((
Inst::mov64_m_r(Amode::imm_reg(-0x31415927i32 as u32, r15), w_rdi),
"498BBFD9A6BECE",
"movq -826366247(%r15), %rdi",
));
// ========================================================
// Cases aimed at checking Addr-esses: IRRS (Imm + Reg + (Reg << Shift))
// Note these don't check the case where the index reg is RSP, since we
// don't encode any of those.
//
// Addr_IRRS, offset max simm8
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(127, Gpr::new(rax).unwrap(), Gpr::new(rax).unwrap(), 0),
w_r11,
),
"4C8B5C007F",
"movq 127(%rax,%rax,1), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(127, Gpr::new(rdi).unwrap(), Gpr::new(rax).unwrap(), 1),
w_r11,
),
"4C8B5C477F",
"movq 127(%rdi,%rax,2), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(127, Gpr::new(r8).unwrap(), Gpr::new(rax).unwrap(), 2),
w_r11,
),
"4D8B5C807F",
"movq 127(%r8,%rax,4), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(127, Gpr::new(r15).unwrap(), Gpr::new(rax).unwrap(), 3),
w_r11,
),
"4D8B5CC77F",
"movq 127(%r15,%rax,8), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(127, Gpr::new(rax).unwrap(), Gpr::new(rdi).unwrap(), 3),
w_r11,
),
"4C8B5CF87F",
"movq 127(%rax,%rdi,8), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(127, Gpr::new(rdi).unwrap(), Gpr::new(rdi).unwrap(), 2),
w_r11,
),
"4C8B5CBF7F",
"movq 127(%rdi,%rdi,4), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(127, Gpr::new(r8).unwrap(), Gpr::new(rdi).unwrap(), 1),
w_r11,
),
"4D8B5C787F",
"movq 127(%r8,%rdi,2), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(127, Gpr::new(r15).unwrap(), Gpr::new(rdi).unwrap(), 0),
w_r11,
),
"4D8B5C3F7F",
"movq 127(%r15,%rdi,1), %r11",
));
// ========================================================
// Addr_IRRS, offset min simm8
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-128i32 as u32,
Gpr::new(rax).unwrap(),
Gpr::new(r8).unwrap(),
2,
),
w_r11,
),
"4E8B5C8080",
"movq -128(%rax,%r8,4), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-128i32 as u32,
Gpr::new(rdi).unwrap(),
Gpr::new(r8).unwrap(),
3,
),
w_r11,
),
"4E8B5CC780",
"movq -128(%rdi,%r8,8), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-128i32 as u32,
Gpr::new(r8).unwrap(),
Gpr::new(r8).unwrap(),
0,
),
w_r11,
),
"4F8B5C0080",
"movq -128(%r8,%r8,1), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-128i32 as u32,
Gpr::new(r15).unwrap(),
Gpr::new(r8).unwrap(),
1,
),
w_r11,
),
"4F8B5C4780",
"movq -128(%r15,%r8,2), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-128i32 as u32,
Gpr::new(rax).unwrap(),
Gpr::new(r15).unwrap(),
1,
),
w_r11,
),
"4E8B5C7880",
"movq -128(%rax,%r15,2), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-128i32 as u32,
Gpr::new(rdi).unwrap(),
Gpr::new(r15).unwrap(),
0,
),
w_r11,
),
"4E8B5C3F80",
"movq -128(%rdi,%r15,1), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-128i32 as u32,
Gpr::new(r8).unwrap(),
Gpr::new(r15).unwrap(),
3,
),
w_r11,
),
"4F8B5CF880",
"movq -128(%r8,%r15,8), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-128i32 as u32,
Gpr::new(r15).unwrap(),
Gpr::new(r15).unwrap(),
2,
),
w_r11,
),
"4F8B5CBF80",
"movq -128(%r15,%r15,4), %r11",
));
// ========================================================
// Addr_IRRS, offset large positive simm32
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
0x4f6625be,
Gpr::new(rax).unwrap(),
Gpr::new(rax).unwrap(),
0,
),
w_r11,
),
"4C8B9C00BE25664F",
"movq 1332094398(%rax,%rax,1), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
0x4f6625be,
Gpr::new(rdi).unwrap(),
Gpr::new(rax).unwrap(),
1,
),
w_r11,
),
"4C8B9C47BE25664F",
"movq 1332094398(%rdi,%rax,2), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(0x4f6625be, Gpr::new(r8).unwrap(), Gpr::new(rax).unwrap(), 2),
w_r11,
),
"4D8B9C80BE25664F",
"movq 1332094398(%r8,%rax,4), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
0x4f6625be,
Gpr::new(r15).unwrap(),
Gpr::new(rax).unwrap(),
3,
),
w_r11,
),
"4D8B9CC7BE25664F",
"movq 1332094398(%r15,%rax,8), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
0x4f6625be,
Gpr::new(rax).unwrap(),
Gpr::new(rdi).unwrap(),
3,
),
w_r11,
),
"4C8B9CF8BE25664F",
"movq 1332094398(%rax,%rdi,8), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
0x4f6625be,
Gpr::new(rdi).unwrap(),
Gpr::new(rdi).unwrap(),
2,
),
w_r11,
),
"4C8B9CBFBE25664F",
"movq 1332094398(%rdi,%rdi,4), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(0x4f6625be, Gpr::new(r8).unwrap(), Gpr::new(rdi).unwrap(), 1),
w_r11,
),
"4D8B9C78BE25664F",
"movq 1332094398(%r8,%rdi,2), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
0x4f6625be,
Gpr::new(r15).unwrap(),
Gpr::new(rdi).unwrap(),
0,
),
w_r11,
),
"4D8B9C3FBE25664F",
"movq 1332094398(%r15,%rdi,1), %r11",
));
// ========================================================
// Addr_IRRS, offset large negative simm32
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-0x264d1690i32 as u32,
Gpr::new(rax).unwrap(),
Gpr::new(r8).unwrap(),
2,
),
w_r11,
),
"4E8B9C8070E9B2D9",
"movq -642586256(%rax,%r8,4), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-0x264d1690i32 as u32,
Gpr::new(rdi).unwrap(),
Gpr::new(r8).unwrap(),
3,
),
w_r11,
),
"4E8B9CC770E9B2D9",
"movq -642586256(%rdi,%r8,8), %r11",
));
insns.push((
Inst::mov64_m_r(
Amode::imm_reg_reg_shift(
-0x264d1690i32 as u32,
Gpr::new(r8).unwrap(),
Gpr::new(r8).unwrap(),
0,
),